A couple of quickie questions: I'm working on the i370 back end to the egcs compiler. I want to make all loads of registers occur well before they are referenced, and in particular, well before they are referenced as base registers. i.e. in c programs that write a->b I want to move other instructions into the gap between when a is fetched & a is used to fetch b, Unlike risc machines & almost everything else out there, it seems a->b needs more pipeline cycles than e.g. (a+b) or even if(a>=b) oddly enough, unlike traditional riscs, there's no branch penalty, but there's a huge dereference penalty. Nother "quickie" question: I have to generate different instructions depending on whether my branch target is more than 4K bytes away. Of course, I don't know how far away until I've gotten further in the compilation. What's the best way to deal with this? (I was thinking of compiling into a temp buffer & then pasting that buffer to output when done) --linas
