[EMAIL PROTECTED] wrote:
> Thanks for your reply Klaus. I just can't believe that the 8530 based cards do
> not seem to work properly with the PC buss on 386 and above. Especially
They usually _do_ work with 386 and 486 systems. They don't work with some
Pentium systems (and in that case, only DMA TX fails) because the timing of
the SCC DMA write cycle is basically
incompatible with that of the PCI/ISA bridges (at least the Intel PIIX3, the
data sheet of which I studied). The bridge guarantees the data on the bus
some time before the rising edge of /IOW. The SCC wants the data to be valid
during the whole /WR=0 pulse, probably because it latches the data with its
own clock.
Neither the PI2 nor the Twin seem to have provisions to work around this
incompatibility, because they were designed long before the PCI/ISA bridges
exposed this problem. (I assume it was a problem before - or did the
ISA "specification" change with time?)
Using the 85230 doesn't help in that case - but you can use the enhanced
FIFO to get higher data rates in interrupt mode. As I said before, 56k is
possible.
Disclaimer: The explanation above has not been proven by a logic analyzer
and thus may be incorrect. Please prove me wrong.
-Klaus
