This patch series improves the UART performance in PCI1XXXX from C0 rev
using burst mode operation. Each transaction processes DWORDs at a time
and the remaining bytes are handled byte-by-byte. With burst mode access
the baud rate support is extended from 1.5 Mbps to 3.9 Mbps.
v1
Initial Submission for review
Rengarajan S (4):
8250: microchip: pci1xxxx: Rearranging the structure declarations
8250: microchip: pci1xxxx: Add Syslock support for reading UART system
registers
8250: microchip: pci1xxxx: Add Burst mode reception support in uart
driver for writing into FIFO
8250: microchip: pci1xxxx: Add Burst mode transmission support in uart
driver for reading from FIFO
drivers/tty/serial/8250/8250_pci1xxxx.c | 313 ++++++++++++++++++++++--
1 file changed, 299 insertions(+), 14 deletions(-)
--
2.25.1
