On Thu, 24 Apr 2025, Ivan Vecera wrote: > Add support for Microchip Azurite DPLL/PTP/SyncE chip family that > provides DPLL and PTP functionality. This series bring first part > that adds the common MFD driver that provides an access to the bus > that can be either I2C or SPI. > > The next part of the series is bringing the DPLL driver that will > covers DPLL functionality. Another series will bring PTP driver and > flashing capability via devlink in the MFD driver will follow soon. > > Testing was done by myself and by Prathosh Satish on Microchip EDS2 > development board with ZL30732 DPLL chip connected over I2C bus. > > Patch breakdown > =============== > Patch 1 - Common DT schema for DPLL device and pin > Patch 2 - DT bindings for microchip,zl3073* devices > Patch 3 - Basic support for I2C, SPI and regmap configuration > Patch 4 - Devlink device registration and info > Patch 5 - Helpers for reading and writing register mailboxes
Whoops! I just this second replied to v3. This needs moving out to somewhere more appropriate. Use MFD to allocate and split the resources, then the sub-devices can do the technical and heavy API stuff. > Patch 6 - Fetch invariant register values used by DPLL/PTP sub-drivers > Patch 7 - Clock ID generation for DPLL driver > Patch 8 - Register/create DPLL device cells -- Lee Jones [李琼斯]