From: Duje Mihanović <d...@dujemihanovic.xyz>
The SoC has 4 onboard PWMs. Add a node for each of them.
Signed-off-by: Duje Mihanović <d...@dujemihanovic.xyz>
---
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 32 ++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index
cf2b9109688ce560eec8a1397251ead68d78a239..61498fd75d1dcaf0d068943c1ac14d3e5a7ca9ae
100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -195,6 +195,38 @@ gpio@100 {
};
};
+ pwm0: pwm@1a000 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a000 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM0>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@1a400 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a400 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM1>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@1a800 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a800 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM2>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@1ac00 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1ac00 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM3>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
pmx: pinmux@1e000 {
compatible = "marvell,pxa1908-padconf",
"pinconf-single";
reg = <0x1e000 0x330>;
--
2.51.0
