Linux-Hardware Digest #757, Volume #14 Fri, 11 May 01 08:13:06 EDT
Contents:
Re: promise ultra66 problems ("Peter Sandstrom")
Re: A7V133 Summary ("arthur")
Sony CDU-31a - driver for SMS 31083 controller? (martin rogers)
Re: What is sendmail? ("Lupus Yonderboy")
PCTEL-modem Linux Driver!!! (PCTEL modem Linux Driver)
PCTEL-modem Linux Driver!!!(I found it) (PCTEL modem Linux Driver)
Re: Linux reads only first session from a multi session CD (Michael Will)
Re: parallel port programming for linux? ("Robert L. Klungle")
----------------------------------------------------------------------------
From: [EMAIL PROTECTED] ("Peter Sandstrom")
Subject: Re: promise ultra66 problems
Date: Fri, 11 May 2001 07:48:38 +0000 (UTC)
Is there support in the kernel for UDMA on RH 7.1 or did you roll your own
kernel ? I'm trying to enable the onboard promise Ultra100 interface on my
RH 7.0 (kernel 2.2.17) linux system (the motherboard is an Asus A7V), but
I'm not sure if this is possible without applying the kernel patch. I
actually tried applying the ide.2.2.17.all.20001120.patch but I got error
messages while doing it. Do I actually need this patch at all ?
---
Peter Sandström, Development Engineer
Oy ISI Industry Software Ab / Brändö Office
Hänninensvägen 2
FIN-66530 Kvevlax, Finland
tel +358 (0)6 3808914
fax +358 (0)6 3182378
--
Posted from www.tassen.fi [62.148.198.27]
via Mailgate.ORG Server - http://www.Mailgate.ORG
------------------------------
From: "arthur" <[EMAIL PROTECTED]>
Subject: Re: A7V133 Summary
Date: Fri, 11 May 2001 01:07:41 -0700
I should add that my m/b is actually an Asus A7V133-RAID but
I am not using the Promise RAID. Also forgot to mention that
a USR 2977/6 modem won't share the USB irq so use PCI
slot 3 for the modem. Don't know if 2.4.x kernel/ppp will fix this
glitch.
Arthur
============================================
In article <[EMAIL PROTECTED]>,
"arthur" <[EMAIL PROTECTED]> wrote:
> I'm using a WD200BB and after enabling udma I get 150+mbs buffer-cache
> reads and 30+mbs buffered reads. This WD drive is similar to the IBM
> you are considering. If you are going to use an internal PCI modem
> then I would get the USR 2977/2976. I am using a 700mhz Duron
> unmodified and am able to run it at 728mhz (104x7) and still have the
> BIOS optimized. I have not changed the BIOS but I did back it up to
> diskette. I am happy with the m/b. It runs win98se and RH7.0 (
> 2.2.16-22 kernel)
>
> Hope this helps.
> Arthur ( remove .remove)
> ------------------
> In article <Ez0K6.178434$[EMAIL PROTECTED]>, "Gerard
> Daubar" <[EMAIL PROTECTED]> wrote:
>
>> Hello,
>>
>> Before I buy the AV7133 I want to check w/ those who have those who
>> have it who have said it works fine and those that have been having
>> problems w/ it on this group.
>>
>> I know some problems seem to be due to IDE drives and the ata/100
>> mode.. Are those of you who aren't having problems using scsi or have
>> dma disabled? I'm using an older smaller capacity scsi drive but also
>> considered getting a newer & larger ibm ide ata/100 drive but obviously
>> won't buy one if the mobo isn't gonna support it =).
>>
>> So if someone could give a summary or describe what setup was working
>> flawlessy, that would be great. (As well as what setup definately
>> doesn't work) I've been searching the group and am not 100% clear on
>> what's working well.
>>
>> Thanks,
>> Gerard
------------------------------
From: martin rogers <[EMAIL PROTECTED]>
Subject: Sony CDU-31a - driver for SMS 31083 controller?
Date: Fri, 11 May 2001 08:18:51 GMT
Thanks for reading-
I have a SMS-31083 (Sun Moon Stars) controller for a (non-IDE) Sony
CDU31A
CDROM that I picked up somewhere.
The command :
insmod cdu31a cdu31a_port=0x340 cdu31a_irq=9 (a la my jumper
setting)
works (the drive LED goes green/red/etc) but mount, eject etc. don't
work.
Actually I'm guessing at the 0x340; so my question is, what command can
I use to
determine the actual addessses this ISA card uses ?
Has anyone used this card ? I did quite a bit of net searching but
haven't gotten
very far.
TIA,
[EMAIL PROTECTED]
==================================
Go Banana !
==================================
------------------------------
From: "Lupus Yonderboy" <[EMAIL PROTECTED]>
Crossposted-To:
comp.os.linux,comp.os.linux.help,comp.os.linux.misc,comp.os.linux.networking
Subject: Re: What is sendmail?
Date: Fri, 11 May 2001 12:47:13 +0200
"Dean Thompson" <[EMAIL PROTECTED]> ha scritto nel messaggio
news:[EMAIL PROTECTED]...
[cut]
> As for the real beauty
> of Exchage (the Web Mail), you will have to look around for a product
which
> does it. I know that there are a few out there which are capable of doing
the
> task, but their names and URL's escape me. However, I would be interested
in
> any web front ends that you did manage to find.
http://www.endymion.com/ have the best webmail interfaces for linux, imho...
ranging from free (for non-commercial institutions) to quite cheap prices
compared to other similar programs. give it a look. i installed Endymion
MailMan free version on my university server and everybody was enthusiast...
it's as professional looking and well working as yahoo or hotmail.
lupus
--
Illegal aliens have always been a problem in the United States. Ask any
Indian.
-- Robert Orben
------------------------------
From: PCTEL modem Linux Driver <[EMAIL PROTECTED]>
Subject: PCTEL-modem Linux Driver!!!
Date: Fri, 11 May 2001 19:34:17 +0900
Hi
I found "Linux Driver" of "Win PCI Modem" using Taiwanese "PCTEL
chipset".
Go http://www.hancom.com (in Korean) and Click "English".
Find "pctel-1.0-1hancom.i386.rpm" (279KB)
Good Luck!
------------------------------
From: PCTEL modem Linux Driver <[EMAIL PROTECTED]>
Subject: PCTEL-modem Linux Driver!!!(I found it)
Date: Fri, 11 May 2001 20:08:29 +0900
Hi
I found "Linux Driver" of "Win PCI Modem" using Taiwanese "PCTEL
chipset".
Go http://www.hancom.com (in Korean) and Click "English".
Find "pctel-1.0-1hancom.i386.rpm" (279KB)
Good Luck!
------------------------------
From: [EMAIL PROTECTED] (Michael Will)
Crossposted-To: comp.os.linux.setup
Subject: Re: Linux reads only first session from a multi session CD
Date: 11 May 2001 11:18:48 GMT
Reply-To: [EMAIL PROTECTED]
In article <3af89137$0$18891$[EMAIL PROTECTED]>, Dances With Crows wrote:
>>Mandrake 8.0, kernel 2.4.3) STILL reads the first session from a
>>multi-session CD in stead of the last session (indeed it does after
>>testing). This means I can't read my CD-R I made containing two
>>I don't want to burn CD's at this point, I only want to read the entire
>>content of the multi-session CD (i.e. using gtktalog). What can I do to
>>accomplish this, or can't I ?
I do not know about reading other peoples multisession cds, but I know
that I had to find out the proper parameters for creating multisession
cds first.
>The only time I've seen this happen is when I've burned a multisession
>CD incorrectly (bad options to mkisofs, etc.)
Me too. It is important that the first session has different parameters
than the subsequent ones. The script for the latter reads out information
from the last session and gives that info to mkisofs, which results basicly
in adding the files to the existing filestructure. So when I mount this
multisessionCD, I see all the old and new files (I put them in different
directories) at the same time. I had no luck trying to mount just one
of the sessions.
This is regardless of kernel 2.2 or 2.4, with a scsi cdrw yamaha 16-6-4,
connected to the onboard adaptec scsi controller of an ASUS P2B-S.
Cheers, Michael Will
--
Man who fish with spear
Need patience
Or get wet and have holes in feet.
------------------------------
From: "Robert L. Klungle" <[EMAIL PROTECTED]>
Subject: Re: parallel port programming for linux?
Date: Thu, 10 May 2001 15:29:14 GMT
This is a multi-part message in MIME format.
==============DAB49455EFAF5B2DC126B1F1
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Content-Transfer-Encoding: 7bit
Robert Taylor wrote:
> Sound like a problem for the driver howtos. You are going to build a
> device/function out of your parrallel port and you want to be able to
> control inidvidual bits as discrete outputs. You may find it simpler to
> use an ISA port on a machine as several vendors sell empty prototype
> boards with the decoder logic already on it. It's a lot simpler to send
> a word to an address using assembly with a fixed address that way and
> this can be done in c as well. I did this using an old 8088 PC in my
> school days to toggle LEDs during a microprocessor course - an
> electronics class back in the mid eighties. We used DOS, Masm and an ISA
> decoder board we built in class.
>
> Bob Taylor
>
> The Snowman wrote:
> >
> > Not sure if this is the right group, but it's more hardware related in
> > nature than programming.
> >
> > c++ I know, but directly controlling hardware with it is uncharted territory
> > to me. Don't know if this is even possible, though I strongly suspect it
> > is, and hence my question :P
> >
> > what I'm looking to do is write a little c++ app that grabs control of the
> > parallel port and sends signals of my choosing from the parallel port.
> > basically I need 6 lines that I can control so as to either have some(how
> > much can I expect?) voltage on them as detected by the device on the other
> > end of the cable.
> >
> > reasons for choosing parallel:
> > 1) I need to be able to set some combination of the lines on/off. ie: lines
> > 1, 3, 4, and 5 on, leaving 2 and 6 off.
> >
> > 2) I'm scrounging parts here :) therefore the fact that I have a few old
> > printer cables and no machines with a free serial port influenced the
> > decision.
> >
> > being able to sense return values would also be nice, but not strictly
> > required.
> >
> > Any help at all would be appreciated.
> >
> > Regards,
> > Snowman
Bob,
Here is a prallel port controller handling a high performance radio system.
It should show you what you need to know.
Please note the top 5 lines.
cheers...bob
==============DAB49455EFAF5B2DC126B1F1
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name="scom.c"
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filename="scom.c"
/*********************************************************************
scom - Application level utility for reading and writing
the 82c55 parallel port
by Robert L. Klungle for Raytheon Systems
Modifications:
Date REA Description
_________ ___ _____________________________________________________
04/20/2001 RLK Created
04/24/2001 RLK Added cleanup to read/write per testing
Added header file
**********************************************************************/
#include <stdio.h>
#include <sys/io.h>
#include <unistd.h>
#include "scom.h"
/*********************************************************************
Parallel port write mechanism to the SCOM radio over the parallel port
______________________________
Host Busy (P14) __| |__________
~500us
____ ___________________________ __________
Data Bus (P0-P9) \/ \/
____/\___________________________/\__________
Data Valid
___________________________
Cmd Clk (P16) _____| |__________
_________________________
Cmd Ack (P15) _________| |_________
--------------------------------------------------------------------
Parallel port read mechanism from the SCOM radio over the parallel port
__ ___________
Host Busy (P14) |______________________________|
~500us
____ ___________________________ __________
Data Bus (P0-P9) \/ \/
____/\___________________________/\__________
Data Valid
___________________________
Dav (P10) _____| |__________
_________________________
Data Ack (P1) _________| |_________
~106us
**********************************************************************/
/* Definitios and Objects */
#define SCOM_PORT 0x378
#define ECP_PORT 0x778
#define LEVEL 3
/* Parallel Port Control Bits */
#define CR_DATA_ACK 0x01 /* inv */
#define CR_HOST_BUSY 0x02 /* inv */
#define CR_CMD_CLK 0x04
#define CR_IRQ_ENABLE 0x10
#define CR_PORT_DIR 0x20 /* inv */
/* Parallel Port Status Bits */
#define SR_CMD_ACK 0x08
#define SR_DAV 0x40
#define r_c (inb(SCOM_PORT+2))
#define r_d (inb(SCOM_PORT+0))
#define r_ecp (inb(ECP_PORT+2))
#define r_s (inb(SCOM_PORT+1))
#define w_c(ch) (outb(ch, SCOM_PORT+2))
#define w_d(ch) (outb(ch, SCOM_PORT+0))
#define w_ecp(ch) (outb(ch, ECP_PORT+2))
#define w_s(ch) (outb(ch, SCOM_PORT+1))
/* Forward References */
static char poly(char *, int);
static inline void scom_reset_cr(char);
static inline void scom_set_cr(char);
#if 0
static SCOM_ERROR_TYPES scom_wait_not_sr(char bits);
static SCOM_ERROR_TYPES scom_wait_sr(char bits);
static SCOM_ERROR_TYPES scom_write_char(char);
#endif
static inline void wait(unsigned long);
/*********************************************************************
Function Implementations
**********************************************************************/
#ifdef SCOM_DEBUG
int main(int argc, char *argv[])
{
char ich[1000];
char och[1000];
int cnt = 1, i, port = SCOM_PORT;
/* capture the parallel port for access */
scom_init();
if (argc != 2)
{
cnt = 1;
och[0] = 'A';
printf("sending %c\n", och[1]);
}
else
{
cnt = strlen(argv[1]);
printf("sending %s\n", argv[1]);
for (i=0; i<cnt; i++) och[i] = argv[1][i];
}
/* write the current string to the port */
if (cnt == 1)
while (1)
{
scom_write(och, cnt);
++och[0];
sleep(1);
}
else
while (1)
{
scom_write(och, cnt);
sleep(1);
}
/* read some data from the port */
cnt = 0;
while ((scom_read(ich, &cnt, 4) == SCOM_TIMEOUT) && (cnt == 0));
printf("Data received: ");
for (i=0; i<cnt; i++)
printf("%d ", ich[i] & 0xff);
printf("\n");
return 0;
}
#endif
/* Close the parallel port */
SCOM_ERROR_TYPES scom_close(void)
{
return SCOM_OK;
}
/* Accumulate a crc polynomial on the fly poly = X^16 + x^12 + x^5 + 1 */
static char poly(char *data, int nchars)
{
int offset;
long crc = 0;
for (offset = 0; offset < nchars; offset++)
{
crc = (crc >> 4) ^ (((crc ^ data[offset]) & 0x0F) * 0x1081);
crc = (crc >> 4) ^ (((crc ^ (data[offset] >> 4)) & 0x0F) * 0x1081);
}
return (char) (crc & 0x000000FF);
}
/* Initialize the parallel port for reading and writing */
SCOM_ERROR_TYPES scom_init(void)
{
char creg, ecp_reg;
if (iopl(LEVEL) < 0)
{
printf("Unable to get port access permissions\n");
return SCOM_PORT_ACCESS;
}
/* first set the ECP parallel port in byte mode */
ecp_reg = r_ecp;
ecp_reg &= 0x1f; /* clear top bits */
ecp_reg |= 0x20; /* set byte mode */
w_ecp(ecp_reg);
#ifdef DEBUG
printf("Init ECP register sent: %x\n", ecp_reg);
#endif
/* setup control register for default */
creg = r_c;
creg &= 0x1f;
/* set data ack low */
creg |= CR_DATA_ACK; /* set pin 1 low */
/* set cmd clock */
creg |= CR_CMD_CLK; /* set pin 16 low */
/* now set default direction bit in */
creg |= CR_PORT_DIR;
w_c(creg);
#ifdef DEBUG
printf("Init control register sent: %x\n", creg);
#endif
return SCOM_OK;
}
/* Open the parallel port for reading/writing */
SCOM_ERROR_TYPES scom_open(void)
{
return SCOM_OK;
}
/*
Read cnt characters from the port into buf
Note: normal state of Host Busy is low (normally receive allowed)
1. Reset host busy (pin 14 low, control bit 1 = 1)
2. Reset data acknowledge (pin 1 low, control bit 1 = 1)
3. After 500us, dav should set (pin 10 high, status bit 6 = 1)
4. Receive data from data port, waiting xxxus between transfers
5. Set data ack (pin 1 high, control bit 0 = 0)
5. After data ack , dav should go low (pin 10 low, status bit 6 = 0)
6. When dav reset, reset data ack (pin 1 low, control bit 0 = 1)
*/
SCOM_ERROR_TYPES scom_read(char *buf, int *cnt, int max)
{
char creg, dreg, sreg;
register int lpcnt;
/*
set direction in, no command clock, no host busy, no data ack
(pins 16, 14, 1 low)
*/
creg = r_c;
creg &= ~CR_PORT_DIR;
creg |= CR_CMD_CLK | CR_HOST_BUSY | CR_DATA_ACK;
w_c(creg);
w_d(0xff); /* clear the data port */
if (max > 0)
{
for (*cnt=0; *cnt<max; (*cnt)++)
{
creg = r_c;
creg |= CR_PORT_DIR | CR_CMD_CLK | CR_HOST_BUSY | CR_DATA_ACK;
w_c(creg);
/* now wait for dav */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_DAV) == 0) /* wait for pin 10 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
{
creg = r_c;
/* Set direction low, command clock low, no host busy, no data ack */
creg |= CR_PORT_DIR | CR_CMD_CLK | CR_HOST_BUSY | CR_DATA_ACK;
w_c(creg);
return SCOM_TIMEOUT;
}
}
/* now read the data character */
dreg = r_d;
buf[*cnt] = dreg;
/* set data ack to radio */
creg = r_c;
creg &= ~CR_DATA_ACK; /* set pin 1 high */
creg |= CR_PORT_DIR | CR_CMD_CLK | CR_HOST_BUSY;
w_c(creg);
/* now wait for dav to clear */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_DAV) == SR_DAV) /* wait for pin 10 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
{
creg = r_c;
/* Set direction low, command clock low, no host busy, no data ack */
creg |= CR_PORT_DIR | CR_CMD_CLK | CR_HOST_BUSY | CR_DATA_ACK;
w_c(creg);
return SCOM_TIMEOUT;
}
}
/* reset data ack to radio */
creg = r_c;
/* Set direction low, command clock low, no host busy, no data ack */
creg |= CR_PORT_DIR | CR_CMD_CLK | CR_HOST_BUSY | CR_DATA_ACK;
w_c(creg);
}
}
return SCOM_OK;
}
/*
* Utility functions to set/reset bits in registers
*/
static inline void scom_reset_cr(char bits)
{
char creg;
creg = r_c;
creg &= ~bits;
w_c(creg);
}
static inline void scom_set_cr(char bits)
{
char creg;
creg = r_c;
creg |= bits;
w_c(creg);
}
/* Unpack the receive buffer to rebuild the top bits of bytes */
SCOM_ERROR_TYPES scom_unpack(char *buf, int *nbytes)
{
int i, j, store_cnt = 0;
for (i=0; i<*nbytes; i += 8)
{
j = 0;
if (i+j < *nbytes)
{
if (buf[i+7] & 0x40)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x20)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x10)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x08)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x04)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x02)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
if (i+j < *nbytes)
{
if (buf[i+7] & 0x01)
buf[i+j] |= 0x80;
buf[store_cnt++] = buf[i+j];
j++;
}
}
*nbytes = store_cnt; /* number of bytes in buffer */
return SCOM_OK;
}
#if 0
static SCOM_ERROR_TYPES scom_wait_not_sr(char bits)
{
char sreg;
register int lpcnt;
sreg = r_s;
lpcnt = 0;
while ((sreg & bits) == bits) /* wait for pin to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
return SCOM_OK;
}
static SCOM_ERROR_TYPES scom_wait_sr(char bits)
{
char sreg;
register int lpcnt;
sreg = r_s;
lpcnt = 0;
while ((sreg & bits) == 0) /* wait for pin to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
return SCOM_OK;
}
#endif
/***************************************************************************
Write cnt characters to the port from buf
Note: normal state for host busy is low
1. Set host busy (pin 14 high, control bit 1 = 0)
2. Send data on data port, waiting xxxus between transfers
3. After 500us, set cmd clk (pin 16 high, control bit 2 = 0)
4. Wait for cmd ack to set(pin 15 high, status bit 3 = 1)
5. Reset cmd clock (pin 16 low, control bit 2 = 1)
6. Cmd ack should reset (pin 15 low, status bit 3 = 0)
***************************************************************************/
SCOM_ERROR_TYPES scom_write(char *buf, int cnt)
{
register int bytecnt, i, lpcnt;
char creg, dreg, sreg;
char mod;
/* compute polynomial crc for this data */
buf[cnt] = poly(buf, cnt) & 0xff;
/* set host busy to radio */
creg = r_c;
creg |= CR_CMD_CLK; /* set pin 16 high */
creg &= ~(CR_PORT_DIR | CR_HOST_BUSY); /* set port out and pin 14 high */
w_c(creg);
wait(10);
/* send transmit request (02H) */
dreg = 0x02; /* data start */
w_d(dreg);
#ifdef DEBUG
printf("Out transmit request sent: %x\n", dreg);
fflush(stdout);
#endif
/* set cmd clock */
creg = r_c;
/* set pin 16 low */
creg &= ~(CR_PORT_DIR | CR_CMD_CLK);
w_c(creg);
/* now wait for cmd ack */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == 0) /* wait for pin 15 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* set cmd clock */
creg = r_c;
creg |= CR_CMD_CLK; /* set pin 16 high */
w_c(creg);
/* now wait for cmd ack reset */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == SR_CMD_ACK) /* wait for pin 15 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* send data byte count adjusted for polynomial crc and top bit pads */
bytecnt = (cnt + 1) + ((cnt + 1) / 7) + (((cnt + 1) % 7) ? 1 : 0);
dreg = bytecnt;
w_d(dreg);
#ifdef DEBUG
printf("Out data byte count sent: %d\n", bytecnt);
#endif
/* set cmd clock */
creg = r_c;
creg &= ~(CR_PORT_DIR | CR_CMD_CLK); /* set pin 16 low */
w_c(creg);
/* now wait for cmd ack */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == 0) /* wait for pin 15 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* set cmd clock */
creg = r_c;
creg |= CR_CMD_CLK; /* set pin 16 high */
w_c(creg);
/* now wait for cmd ack reset */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == SR_CMD_ACK) /* wait for pin 15 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/*
Now transmit the data. Need to isolate bit 7 from each 7 bytes and
send an eighth byte with the previous 7 bits mapped into it.
Note: receive has to reassemble them the same way
*/
mod = 0;
for (i=0; i<(cnt+1); i++)
{
dreg = *(buf+i);
mod |= (dreg & 0x80) ? (0x40 >> (i % 7)) : 0;
dreg &= ~0x80;
w_d(dreg);
#ifdef DEBUG
printf("Out data sent: %x\n", dreg);
#endif
/* set cmd clock */
creg = r_c;
creg &= ~(CR_PORT_DIR | CR_CMD_CLK); /* set pin 16 low */
w_c(creg);
/* now wait for cmd ack */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == 0) /* wait for pin 15 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* set cmd clock */
creg = r_c;
creg |= CR_CMD_CLK; /* set pin 16 high */
w_c(creg);
/* now wait for cmd ack reset */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == SR_CMD_ACK) /* wait for pin 15 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/*
Now see if it is time to send the sign bit carrier byte.
Send if modulo 7, or last byte sent.
*/
if ((i > cnt) || ((i+1) % 7) == 0)
{
w_d(mod); /* send the modulus */
#ifdef DEBUG
printf("Modulus data sent: %x\n", mod);
#endif
/* set cmd clock */
creg = r_c;
creg &= ~(CR_PORT_DIR | CR_CMD_CLK); /* set pin 16 low */
w_c(creg);
/* now wait for cmd ack */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == 0) /* wait for pin 15 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* set cmd clock */
creg = r_c;
creg |= CR_CMD_CLK; /* set pin 16 high */
w_c(creg);
/* now wait for cmd ack reset */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == SR_CMD_ACK) /* wait for pin 15 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
mod = 0;
}
}
/*
Now see if it is time to send the sign bit carrier byte.
Send if modulo 7, or last byte sent.
*/
if ((i % 7) != 0)
{
w_d(mod); /* send the modulus */
#ifdef DEBUG
printf("Final modulus data sent: %x\n", mod);
#endif
/* set cmd clock */
creg = r_c;
creg &= ~(CR_PORT_DIR | CR_CMD_CLK); /* set pin 16 low */
w_c(creg);
/* now wait for cmd ack */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == 0) /* wait for pin 15 to go high */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
/* set cmd clock */
creg = r_c;
creg |= CR_PORT_DIR | CR_CMD_CLK; /* set direction in and pin 16 high */
w_c(creg);
/* now wait for cmd ack reset */
sreg = r_s;
lpcnt = 0;
while ((sreg & SR_CMD_ACK) == SR_CMD_ACK) /* wait for pin 15 to go low */
{
sreg = r_s;
if (++lpcnt == 0)
return SCOM_TIMEOUT;
}
}
/* set host not busy and keep cmd clock high */
creg = r_c;
creg |= CR_HOST_BUSY | CR_CMD_CLK; /* set pin 14 low and pin 16 high */
w_c(creg);
wait(10);
return SCOM_OK;
}
/* Instruction loop for waiting (replace with setitimer later */
static inline void wait(unsigned long t)
{
usleep(t);
}
==============DAB49455EFAF5B2DC126B1F1
Content-Type: text/plain; charset=us-ascii;
name="scom.h"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline;
filename="scom.h"
/*********************************************************************
scom - Application level utility for reading and writing
the 82c55 parallel port
by Robert L. Klungle for Raytheon Systems
Modifications:
Date REA Description
_________ ___ _____________________________________________________
04/24/2001 RLK Created
**********************************************************************/
typedef enum
{
SCOM_BAD_COUNT,
SCOM_OK,
SCOM_OPEN,
SCOM_PORT_ACCESS,
SCOM_READ,
SCOM_TIMEOUT,
SCOM_WRITE,
SCOM_NR_ERRORS
} SCOM_ERROR_TYPES;
SCOM_ERROR_TYPES scom_close(void);
SCOM_ERROR_TYPES scom_init(void);
SCOM_ERROR_TYPES scom_open(void);
SCOM_ERROR_TYPES scom_read(char *buf, int *cnt, int max);
SCOM_ERROR_TYPES scom_write(char *buf, int cnt);
SCOM_ERROR_TYPES scom_unpack(char *buf, int *);
==============DAB49455EFAF5B2DC126B1F1==
------------------------------
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