From: Tianyu Lan <ltyker...@gmail.com> Sent: Wednesday, August 6, 2025 9:01 AM
>
> When Secure AVIC is enabled, VMBus driver should
> call x2apic Secure AVIC interface to allow Hyper-V
> to inject VMBus message interrupt.
>
> Reviewed-by: Neeraj Upadhyay <neeraj.upadh...@amd.com>
> Signed-off-by: Tianyu Lan <ti...@microsoft.com>
> ---
> Change since RFC V5:
> - Rmove extra line and move hv_enable_coco_interrupt()
> just after hv_set_msr() in the hv_synic_disable_regs().
>
> Change since RFC V4:
> - Change the order to call hv_enable_coco_interrupt()
> in the hv_synic_enable/disable_regs().
> - Update commit title "Drivers/hv:" to "Drivers: hv:"
>
> Change since RFC V3:
> - Disable VMBus Message interrupt via hv_enable_
> coco_interrupt() in the hv_synic_disable_regs().
> ---
> arch/x86/hyperv/hv_apic.c | 5 +++++
> drivers/hv/hv.c | 4 ++++
> drivers/hv/hv_common.c | 5 +++++
> include/asm-generic/mshyperv.h | 1 +
> 4 files changed, 15 insertions(+)
>
> diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> index 01bc02cc0590..c9808a51fa37 100644
> --- a/arch/x86/hyperv/hv_apic.c
> +++ b/arch/x86/hyperv/hv_apic.c
> @@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
> wrmsrq(HV_X64_MSR_ICR, reg_val);
> }
>
> +void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool
> set)
> +{
> + apic_update_vector(cpu, vector, set);
> +}
> +
> static u32 hv_apic_read(u32 reg)
> {
> u32 reg_val, hi;
> diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
> index 308c8f279df8..355663a6e3b8 100644
> --- a/drivers/hv/hv.c
> +++ b/drivers/hv/hv.c
> @@ -316,6 +316,8 @@ void hv_synic_enable_regs(unsigned int cpu)
> shared_sint.auto_eoi = hv_recommend_using_aeoi();
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
> +
> /* Enable the global synic bit */
> sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
> sctrl.enable = 1;
> @@ -349,6 +351,8 @@ void hv_synic_disable_regs(unsigned int cpu)
> /* Disable the interrupt */
> hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
>
> + hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
> +
> simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
> /*
> * In Isolation VM, sim and sief pages are allocated by
> diff --git a/drivers/hv/hv_common.c b/drivers/hv/hv_common.c
> index 49898d10faff..0f024ab3d360 100644
> --- a/drivers/hv/hv_common.c
> +++ b/drivers/hv/hv_common.c
> @@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64
> param2)
> }
> EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
>
> +void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector,
> bool set)
> +{
> +}
> +EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
> +
> void hv_identify_partition_type(void)
> {
> /* Assume guest role */
> diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h
> index a729b77983fa..7907c9878369 100644
> --- a/include/asm-generic/mshyperv.h
> +++ b/include/asm-generic/mshyperv.h
> @@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
> bool hv_isolation_type_snp(void);
> u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32
> input_size);
> u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
> +void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool
> set);
> void hyperv_cleanup(void);
> bool hv_query_ext_cap(u64 cap_query);
> void hv_setup_dma_ops(struct device *dev, bool coherent);
> --
> 2.25.1
>
Reviewed-by: Michael Kelley <mhkli...@outlook.com>
