> -----Original Message-----
> From: Jakub Kicinski <[email protected]>
> Sent: Monday, January 12, 2026 8:22 PM
> To: Haiyang Zhang <[email protected]>
> Cc: Haiyang Zhang <[email protected]>; linux-
> [email protected]; [email protected]; KY Srinivasan
> <[email protected]>; Wei Liu <[email protected]>; Dexuan Cui
> <[email protected]>; Long Li <[email protected]>; Andrew Lunn
> <[email protected]>; David S. Miller <[email protected]>; Eric
> Dumazet <[email protected]>; Paolo Abeni <[email protected]>; Konstantin
> Taranov <[email protected]>; Simon Horman <[email protected]>; Erni
> Sri Satya Vennela <[email protected]>; Shradha Gupta
> <[email protected]>; Saurabh Sengar
> <[email protected]>; Aditya Garg
> <[email protected]>; Dipayaan Roy
> <[email protected]>; Shiraz Saleem
> <[email protected]>; [email protected]; linux-
> [email protected]; Paul Rosswurm <[email protected]>
> Subject: Re: [EXTERNAL] Re: [PATCH V2,net-next, 1/2] net: mana: Add
> support for coalesced RX packets on CQE
>
> On Mon, 12 Jan 2026 21:01:59 +0000 Haiyang Zhang wrote:
> > > > Our NIC can have up to 4 RX packets on 1 CQE. To support this
> feature,
> > > > check and process the type CQE_RX_COALESCED_4. The default setting
> is
> > > > disabled, to avoid possible regression on latency.
> > > >
> > > > And add ethtool handler to switch this feature. To turn it on, run:
> > > > ethtool -C <nic> rx-frames 4
> > > > To turn it off:
> > > > ethtool -C <nic> rx-frames 1
> > >
> > > Exposing just rx frame count, and only two values is quite unusual.
> > > Please explain in more detail the coalescing logic of the device.
> > Our NIC device only supports coalescing on RX. And when it's disabled
> each
> > RX CQE indicates 1 RX packet; when enabled each RX CQE indicates up to 4
> packets.
>
> I get that. What is the logic for combining 4 packets into a single
> completion? How does it work? Your commit message mentions "regression
> on latency" - what is the bound on that regression?
When we received CQE type CQE_RX_COALESCED_4, it's a coalesced CQE. And in the
CQE
OOB, there is an array with 4 PPI elements, with each pkt's length:
oob->ppi[i].pkt_len.
So we read the related WQE and the DMA buffers for the RX pkt payloads, up to 4.
But, if the coalesced pkts <4, the pkt_len will be 0 after the last pkt, so we
know when to stop reading the WQEs.
Thanks,
- Haiyang
