On Thu, Jan 21, 2010 at 12:27:43PM +0100, Valentin Longchamp wrote: > After generating the stop bit by changing MSTA from 1 to 0, > the i2c_imx->stopped was immediatly set to 1. The second test > on i2c_imx->stopped then is correct and the controller never > waits if the bus is busy. This patch corrects this. > > On mx31moboard, stop bit was not generated on single write transfers. > This was kept unnoticed other transfers are made afterwards that > help the write recipient to resynchronize.
"as other transfers"? > Thanks to Philippe and Michael for the debugging. Either full names, or maybe even Reported-by or Tested-by tags? > Signed-off-by: Valentin Longchamp <[email protected]> Patch itself looks good to me: Acked-by: Wolfram Sang <[email protected]> -- Pengutronix e.K. | Wolfram Sang | Industrial Linux Solutions | http://www.pengutronix.de/ |
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