On Thu, 2013-06-13 at 10:16 +0200, Christian Ruppert wrote: > As promised, I gave this one some over-night stress testing and I can > confirm what I said previously: > > - The patch does _not_ solve the interrupt loop lockups on its own.
So, it just means my assumptions about what is happening there were wrong. > - The patch works well in conjunction with > http://patchwork.ozlabs.org/patch/249622/ (which in turn depends on > Mika's patch). Under this condition you can assume > Tested-By: Christian Ruppert <[email protected]> > > I still think the code is more logical with this patch than without it > and I am in favour of applying both (if Andy agrees that is). Since my patch doesn't fix anything, I think we may drop it away. > We must keep in mind, however, that http://patchwork.ozlabs.org/patch/249622 > does fix a real problem we can observe on our chip and for our TB10x > product we do require some form of it for stability reasons. I feel like a real fix is to add a memory barier to make changes in the structure consistent. However, I have no clue where. -- Andy Shevchenko <[email protected]> Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
