From: Kedareswara rao Appana <[email protected]> In write operation, after filling address byte to tx fifo, set the direction of transfer to tx using control register.
Signed-off-by: Kedareswara rao Appana <[email protected]> Signed-off-by: Michal Simek <[email protected]> --- drivers/i2c/busses/i2c-xiic.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 5eb0a8b..44e6ae7 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -536,6 +536,7 @@ static void xiic_start_recv(struct xiic_i2c *i2c) static void xiic_start_send(struct xiic_i2c *i2c) { struct i2c_msg *msg = i2c->tx_msg; + u32 cr; xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK); @@ -556,6 +557,10 @@ static void xiic_start_send(struct xiic_i2c *i2c) xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); } + cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + cr |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr); + xiic_fill_tx_fifo(i2c); /* Clear any pending Tx empty, Tx Error and then enable them. */ -- 1.8.2.3
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