On Fri, Mar 27, 2015 at 02:10:45PM +0100, Wolfram Sang wrote: > On Sat, Mar 07, 2015 at 11:33:49AM +0100, Wolfram Sang wrote: > > On Fri, Mar 06, 2015 at 11:05:31PM +0100, Wolfram Sang wrote: > > > > > > > I asked Kataoka-san about this and his response was as follows: > > > > > > Thanks, Simon! > > > > > > > If system(CPU) is busy, the driver can't clear the status register soon > > > > after kicking start. > > > > > > > > If sequence of first start is as follows, there is a problem. > > > > Because H/W starts by 1. > > > > But sequence of re-start is as follows, there is no problem. > > > > Because H/W starts by 2. > > > > > > > > 1. Issue START condition by ESG bit of ICMCR register. > > > > <--- If there is too much time, H/W finish > > > > transmitting > > > > and set status in status register. > > > > 2. Clear interrupt status (ICMSR). > > > > 3. Open interrupt mask. > > > > 4. Wait interrupt. > > > > <--- If status is cleared, interrupt does not occur. > > > > > > I understand. I'll add this explanation to the patch and apply it soon. > > > > Sorry, another question came up while applying: > > > > How can this interruption happen? The function is called in a > > spin_lock_irqsave protected area. Is this an RT_PREEMPT related issue? > > Am I missing something? > > Hi, > > any news on this one?
Sorry, I seem to have dropped the ball here. I've (finally) forwarded your question on to the BSP team. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
