On Mon, Nov 02, 2015 at 02:03:36AM +0000, Mans Rullgard wrote:
> Sigma Designs chips use a variant of this controller with the following
> differences:
> - The BUSY bit in the STATUS register is inverted
> - Bit 8 of the CONFIG register must be set
> - The controller can generate interrupts
> This patch adds support for the first two of these.  It also calculates
> and sets the correct clock divisor if a clk is provided.  The bus
> frequency is optionally speficied in the device tree node.

Fixed the "speficied" typo and...

> Signed-off-by: Mans Rullgard <m...@mansr.com>

... applied to for-next, thanks!

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