On Monday, March 7, 2005 3:36 pm, Grant Grundler wrote: > On Mon, Mar 07, 2005 at 03:11:46PM -0800, Jesse Barnes wrote: > > So the MSIs are programmed to point at the processor SAPIC block? I > > think that'll work for us on Altix, but if they're pointed at an external > > Intel (or compatible) interrupt controller, we'll have to write new code > > for Altix. > > Assuming your "Processor Interrupt Block" (IIRC) is at 0xfee00000 > it should just work.
Cool, I was hoping it just pointed at the same place we use for IPIs. It *should* work on Altix then, assuming the MSI allocation routines don't have platform knowledge in them (like ACPI bits or something). Thanks, Jesse - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
