Patch to disable SGI TIOCA GART TLB prefetching due to hw bug.
Signed-off-by: Mark Maule <[EMAIL PROTECTED]>
===== arch/ia64/sn/pci/tioca_provider.c 1.1 vs 1.2 =====
--- 1.1/arch/ia64/sn/pci/tioca_provider.c 2005-03-10 16:33:04 -06:00
+++ 1.2/arch/ia64/sn/pci/tioca_provider.c 2005-03-16 16:28:48 -06:00
@@ -171,15 +171,15 @@
* use agp op-combining
* use GET semantics to fetch memory
* participate in coherency domain
- * prefetch TLB entries
+ * DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
*/
ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY; /* PV895469 ? */
ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT);
tioca_kern->ca_gart_iscoherent = 1;
- ca_base->ca_control2 |=
- (CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
+ ca_base->ca_control2 &=
+ ~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
/*
* Unmask GART fetch error interrupts. Clear residual errors first.
-
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