Can you explain this part of the patch?

-#define PCI32_ATE_CO                    (0x1 << 1)
-#define PCI32_ATE_PREC                  (0x1 << 2)
+#define PCI32_ATE_CO                    (0x1 << 1)     /* PIC ASIC ONLY */
+#define PCI32_ATE_PIO                   (0x1 << 1)     /* TIOCP ASIC ONLY */

Why is PCI32_ATE_PIO now the same value as PCI_ATE_CO?

-Tony
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