> No :) those interested are big hardware makers of large scaled out > boxes, such as HP, UIS. They are using own asics and are not > necessarily being able to keep chipset native capabilities intact. As > I said in the preamble, the mechanism has to be there so they can turn > the ptc.g off and run the OS.
This really sounds like it is best done as a machvec. Currently, Altix (sn2) does not have a ptc.g that spans nodes. We have our own tlb purge mechanism which is very flexible and scalable. Maybe it would be best to follow that example. To repeat Bjorn's comments, this area can be fraught with _VERY_ difficult to diagnose problems. A boot test can hardly be expected to uncover all the races so be patient while we walk through this code. Thanks, Robin - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
