Alan Cox wrote:
pata_cs5536.c relies on Geode Machine Specific Registers to configure
the ATA function and uses the correct PIO timings for the chip.
Signed-off-by: Martin K. Petersen <[EMAIL PROTECTED]>
I'm basically happy with this but would appreciate some feedback from AMD
on the subject.
(cc added therefore : [EMAIL PROTECTED])
+ .qc_issue = ata_qc_issue_prot,
The older AMD ex NS ex Cyrix chipsets mishandle 64K DMA blocks - is that
the case for the CS5536 or not - does it consider a PRD entry with zero
length as 64K or 0 bytes
Good point.
+ if ((cfg & IDE_CFG_CHANEN) == 0) {
+ printk(KERN_ERR "CS5536: disabled by BIOS\n");
To save Jeff whining - he'll want that to be DRV_NAME or similar and to
call it pata_cs5536
Now I'm embarrassed... I looked over the driver and missed this ;-) ;-)
Jeff
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