Err.. PIO data transfer within a sector (or multiple sector block) is supposed to be synchronous in hardware. This means the chip/board should be using IORDY to stretch the cycle until data can be supplied within each 256-word interrupt group.
Right?
Mat Loikkanen wrote:
We've run into the issue of ata_mmio_data_xfer() reading our host controller's data fifo too fast -- requesting a data word when the fifo was empty, before the device had sent PIO data (in our observed case somewhere in the middle of a 512 byte IDENTIFY DEVICE PIO data transfer). I can't see any provision in Libata for a case like ours where the processor and bus are "too fast". Has anyone run into this issue before? Any ideas on what we should do about it? We can make our host controller to wait-state the bus ... but for how long, what if data never arrives ... Thanks for any help.
-mat
Mat Loikkanen
Synopsys, Inc.
- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
