Alan wrote: >>> Is your IDE controller LBA48 capable ? >> Well TBH I have no contoller. As I said I am using an embedded ARM board. >> The HDD is connected via a FPGA. The internal HDD registers simply memory >> mapped. Works fine. Usually. By now we seem to have trouble with that >> Seagate drive... > > The reason I ask is that the stuff which is going wrong is the stuff > which requires two fetches from the drive registers. Could that be a > caching bug (eg caching it, prefetching and thus reading a register too > many times etc) - it seems more likely than the drive given that nobody > else is seeing anything like this.
Hmm. Don't think so. Since the use of ioremap() I think the MMU treats the area as none-cacheable, right? Steven - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
