Mikael Pettersson wrote:
+ if (hp->flags & PDC_FLAG_GEN_II) {
+ /* record ASIC rev */
+ pci_read_config_byte(pdev, PCI_REVISION_ID, &hp->asic_rev);
+
+#if 1
+ /* set cache line size = 1 */
+ pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &tmp);
+ printk("%s: changing pci_cache_line_size from %#02x to 0x01\n",
+ __FUNCTION__, tmp);
+ pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x01);
+#endif
This bit strikes me as somewhat dubious. If this proves to actually fix
something, I would start by exporting pci_set_cacheline_size() in
drivers/pci/pci.c, using it, and seeing if that helps.
Jeff
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