Alan Cox wrote: > Found these by inspection: > > Command issuing goes via ata_qc_reinit() which sets up the device bits > for the command to include the device select bit. > > If we are using NCQ then the code in ata_build_rw_tf sets bit 6 directly > without using |= which clears the device select bit and means any NCQ > command will go to the first device regardless. > > The non NCQ path thankfully doesn't blat the other bits and right now we > have no slave devices on NCQ supporting hardware I believe.
The code is actually intended that way. The NCQ spec mandates the bit to be zero. The device/head register layout is.. FUA 1 Res 0 Res Res Res Res We probably need better comment there tho. -- tejun - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
