Title: Scripting inside Makefile

 I need a portable script that can be automatically executed during build (old system - make 3.74).
Suppose I can't make others to upgrade their utilities (shell, sed, make ...) so no new features
are allowed.
 The source is a directory with many files, all have a common word ('CDU' in my example).
 I need to create two different copies, each will be renamed (abcCDUdef.h -> abcCDU_1def.h
and the same with _2). Then, inside each (new) file to rename all functions, variables and
comments with the same rule (sed -ise "/s/CDU/CDU_1/g" * will do but the original sed is 2.05
so no I or s flags are valid).

 Bottom line - primitive sed and old make are the common denominator.

 Is this the right way to go :

LIST   = $(wildcard *CDU*)
LIST1  = $(subst CDU,CDU_1,$(LIST))
LIST1A = $(subst .h,'.h;',$(LIST1))
LIST1B = $(subst .c,'.c;',$(LIST1A))
COPY1  = $(join $(LIST),$(LIST1B))
COPY1A = $(subst .h,'.h ',$(COPY1))
COPY1B = $(subst .c,'.c ',$(COPY1A))
COPY1C = $(subst ;,';cp ',$(COPY1B))
COPY1D = copy $(COPY1C)
RESULT := $(shell $(COPY1D))
all:
        @echo $(COPY1D)

?


 
 
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