guy keren wrote:
sorry, didn't mean to confuse. i didn't say that this is what happens - iActually, 80386 and higher do have that. If the CPU is in protected mode, the segment can be marked as either a 32bit or 16bit segment. If it's the former, the same operands are interpreted as EAX, EBX etc. rather than AX, BX etc. There are single byte prefixes to a specific command to the 16/32 bit semantics, regardless of the "Default" for that segment. This is what r16/r32 mean in the CPU page.
assume that it does not, but i see this as the only way, for the
implementors of the CPU, if they ever wanted that, to have the same
op-code represent two different commands.
Obviously, if the CPU is in real or virtual 86 mode, all commands are 16 bits and that's it.
again, i think this is not the case - i just didn't want to say somethingLike I said above, it is. Then again, XCHG EAX,EAX does exactly the same as XCHG AX,AX, so not problem there.
for certain, without being sure about it.
unless the CPU was optimized to not do an operation which is known to beJudging by the timing numbers, at least some of them were. I.e. - XCHG AX,AX (aka NOP) took less time than XCHG AX,BX. There are good reasons both for and against doing this "optimization".
meaningless...
..unless it has some other side effects (e.g. changing CPU's flags suchNot in this case. I think the reason XCHG AX,AX was chosen as NOP was that they are exactly equivalent in meaning.
as carry, flushing pipelines, or what-not).
If anyone is really interested, you can download the book Tal has in print from the Intel site. http://developer.intel.com/design/Pentium4/manuals/25366614.pdf
-- Shachar Shemesh Lingnu Open Source Consulting ltd. http://www.lingnu.com/
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