Oron
Thanks - i just learned something. :-)
This is Debian right? Would have thought it would be a widely reported issue.
It smells like a combination of hardware and kernel related to APIC
The P5 has a local APIC and an I/O APIC for interrupts on SMP - so I assume there is a kernel patch to use APIC interrupts since only the P6 enables software control of APIC.
Maybe it's an issue related to using SMP and a P6 with 2 hyperthreaded processors.
This is pure speculation - I'm not at Oron's level of understanding .
danny
Oron Peled wrote:
On Monday 21 February 2005 15:51, Danny Lieberman wrote:
It sounds to me like a case of a very sick realtime clock - maybe the motherboard is sensitive to voltage fluctuations - i think the clock might be a vco
The RTC has nothing to do with kernel time after boot. It is only used to initialize the kernel internal clock which is updated by the PIC interrupts (And there isn't an "Uninterrupt" which can swing the "jiffies" counter backwards :-)
Are you using ntpd? If not - I would try running ntpd and see if the problem goes away
ntpd won't sync a clock when the offset is large. However, doing a one time ntpdate(8) may give us more information.
Regretfully, it does look like a severe kernel/glibc bug.
-- Danny Lieberman Visit us at http://www.software.co.il Office + 972 8 970-1485 Cell + 972 54 447-1114
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