On Thu, Aug 09, 2007 at 02:59:02PM +0300, Ira Abramov wrote:
> Quoting Muli Ben-Yehuda, from the post of Thu, 09 Aug:
> > 
> > Because some PCI devices cannot deal with addresses over 4G. To be
> > able to map the RAM that has physical address over 4G in the CPU's
> > page tables, you need a PAE kernel. As for the penalty on speed, I
> > doubt you'll be able to measure it, and it will be offset by the extra
> > RAM.
> 
> According to Marc (who is a man I don't like to disagree with) it's
> a hit of 3-5% on average on grid machines if I recall.

I would like to understand this better, if you or Marc could shed more
details? In general, I believe you know what they say about "lies,
damn lies, and performance numbers". See some numbers from Ingo Molnar
which give the PAE overhead at a round 0.0% here:
http://kerneltrap.org/node/2891. YMMV.

   100Hz                100.00%
   100Hz + PAE:           0.00%

   1000Hz:               -1.08%
   1000Hz + PAE:         -1.08%

Cheers,
Muli

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