On Mon, 05 Nov 2007 08:07:44 +0100 Giacomo Catenazzi wrote: > Randy Dunlap wrote: > > On Sat, 03 Nov 2007 09:40:13 +0100 Giacomo Catenazzi wrote: > > > >> Randy Dunlap wrote: > >>> rfh == request for help. > >>> > >>> I tried to do $subject and failed miserably. > >>> > >>> For how to cause the Documentation/ examples to be built, > >>> I considered using a new CONFIG_ symbol, an environment variable > >>> (or a command-line variable), a completely separate Makefile, > >>> or a "check" string (these are special-cased in the top-level > >>> Makefile). I ended up trying to use a command-line variable "X", > >>> as in: > >>> > >>> $ make X=1 all > >>> > >>> which sets KBUILD_EX to 1, and then I (tried to) use KBUILD_EX > >>> in top-level and subordinate Makefiles to control building the > >>> example source files. > >> I don't like the method you selected. > >> I think the most used use is to read and build examples > >> directly from one directory, so we should design the > >> system from this assumption. > >> > >> So I will do a simple recursive Makefiles > >> (and every makefile will include a ../../scripts/Makefile.example), > >> so that we can do "make" for every example. > > > > BTW, what causes "Makefile.example" to be used instead of just > > "Makefile"? > > In Documentation/foo/ should have a Makefile, but this Makefile > should include standard definitions, so a scripts/Makefile.example. > Not a Makefile because: > 1) to distinguish the Makefiles: these are the .h of makefile, not > direcly executed makefile; > 2) in scripts/ there are already many Makefile.* > 3) current Makefile's will also do other things (not only definitions) > (and std Makefile's have other expectation of CWD) > > But maybe I did not explain my proposal:
OK, I understand it better now. Thanks for your help. > I.e. in Documentation/foo/Makefile: > > ---- > include ../../scripts/makefile.example > > examples: foo-test > > foo-test: foo-test.c > $(CC) $(CFLAGS) -o $@ $^ > ---- > (or CC or HOSTCC, no real preferences). > > so in Documentation/foo/ I can run make. > > In main Makefile, something like: > > ---- > examples: > @for makefile in $$(find Documentation -name Makefile) \ > (cd $$(dirname makefile) \ > $(MAKE) examples ) > ---- --- ~Randy - To unsubscribe from this list: send the line "unsubscribe linux-kbuild" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
