Hello, This small series adds a pinctrl setting for fast MMC bus clocks to the pxav3 driver. On bus clocks above 100 MHz, driving the data pins at a higher current helps maintain signal quality.
This series is related to Marvell PXA1908 SoC support; the latest version of that patchset (v16 as of now) can be found at https://lore.kernel.org/20250708-pxa1908-lkml-v16-0-b4392c484...@dujemihanovic.xyz The series is RFC because of the following: * I'm unsure whether setting pinctrl-{names,1} to true in the top level of the binding is correct. * Other mainline MMC drivers select between default and UHS states based on the signal voltage. The PXA1908 vendor kernel does it based on the bus clock. I followed the vendor kernel, but do not know whether this is bad practice and therefore the other mainline drivers should be followed instead. Signed-off-by: Duje Mihanović <d...@dujemihanovic.xyz> --- Changes in v2: - Address maintainer comments: - Newline between properties in if: - Don't try to lookup pinstates if pinctrl is NULL - Only change pinstates if both are valid - Replace dev_warn() with dev_dbg() - Link to v1: https://lore.kernel.org/r/20250718-pxav3-uhs-v1-0-2e451256f...@dujemihanovic.xyz --- Duje Mihanović (2): dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrl mmc: sdhci-pxav3: add state_uhs pinctrl setting .../devicetree/bindings/mmc/sdhci-pxa.yaml | 47 +++++++++++++++++----- drivers/mmc/host/sdhci-pxav3.c | 31 +++++++++++++- include/linux/platform_data/pxa_sdhci.h | 7 ++++ 3 files changed, 74 insertions(+), 11 deletions(-) --- base-commit: 038d61fd642278bab63ee8ef722c50d10ab01e8f change-id: 20250718-pxav3-uhs-d956bfed13f0 Best regards, -- Duje Mihanović <d...@dujemihanovic.xyz>
