Hi Jesse, On Wed, Aug 6, 2025 at 1:10 AM Jesse Taube <je...@rivosinc.com> wrote: > > The Sdtrig RISC-V ISA extension does not have a resume flag for > returning to and executing the instruction at the breakpoint. > To avoid skipping the instruction or looping, it is necessary to remove > the hardware breakpoint and single step. Use the icount feature of > Sdtrig to accomplish this. Use icount as default with an option to allow > software-based single stepping when hardware or SBI does not have > icount functionality, as it may cause unwanted side effects when reading > the instruction from memory. > > Signed-off-by: Jesse Taube <je...@rivosinc.com> > --- > OpenSBI implementation of sbi_debug_read_triggers does not return the > updated CSR values. There needs to be a check for working > sbi_debug_read_triggers before this works. > > https://lists.riscv.org/g/tech-prs/message/1476 > > RFC -> V1: > - Add dbtr_mode to rv_init_icount_trigger > - Add icount_triggered to check which breakpoint was triggered > - Fix typo: s/affects/effects > - Move HW_BREAKPOINT_COMPUTE_STEP to Platform type > --- > arch/riscv/Kconfig | 11 ++ > arch/riscv/kernel/hw_breakpoint.c | 179 +++++++++++++++++++++++++++--- > 2 files changed, 172 insertions(+), 18 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index fd8b62cdc6f5..37f01ed199f3 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -546,6 +546,17 @@ config RISCV_COMBO_SPINLOCKS > > endchoice > > +config HW_BREAKPOINT_COMPUTE_STEP > + bool "Allow computing hardware breakpoint step address" > + default n > + depends on HAVE_HW_BREAKPOINT > + help > + Select this option if hardware breakpoints are desired, but > + hardware or SBI does not have icount functionality. This may cause > + unwanted side effects when reading the instruction from memory. > + > + If unsure, say N. > +
We expect the same kernel image to work on a platform with icount triggers and without icount triggers. Please drop this kconfig option. The decision of falling back to computing hardware breakpoint step address should be at boot-time and not compile-time. Regards, Anup
