The 2025 dpISA extensions introduce a number of architecture features all of which are fairly straightforward from a kernel point of view since they only introduce new instructions, not any architecture state.
All the relevant newly added ID registers are already exported by KVM, all non-RES0 bits in ID_AA64ZFR0_EL1 and ID_AA64FPFR0_EL1 are writable and the updates to ID_AA64ISARx_EL1 are all additional values in already exported bitfields. Signed-off-by: Mark Brown <[email protected]> --- Mark Brown (8): arm64/hwcap: Generate the KERNEL_HWCAP_ definitions for the hwcaps arm64/sysreg: Update ID_AA64ISAR0_EL1 description to DDI0601 2025-12 arm64/sysreg: Update ID_AA64ISAR2_EL1 description to DDI0601 2025-12 arm64/sysreg: Update ID_AA64FPFR0_EL1 description to DDI0601 2025-12 arm64/sysreg: Update ID_AA64ZFR0_EL1 description to DDI0601 2025-12 arm64/sysreg: Update ID_AA64SMFR0_EL1 description to DDI0601 2025-12 arm64/cpufeature: Define hwcaps for 2025 dpISA features kselftest/arm64: Add 2025 dpISA coverage to hwcaps Documentation/arch/arm64/elf_hwcaps.rst | 24 ++++++ arch/arm64/include/asm/hwcap.h | 120 +----------------------------- arch/arm64/include/uapi/asm/hwcap.h | 8 ++ arch/arm64/kernel/cpufeature.c | 11 +++ arch/arm64/kernel/cpuinfo.c | 8 ++ arch/arm64/tools/Makefile | 8 +- arch/arm64/tools/gen-kernel-hwcaps.sh | 23 ++++++ arch/arm64/tools/sysreg | 20 ++++- tools/testing/selftests/arm64/abi/hwcap.c | 116 +++++++++++++++++++++++++++++ 9 files changed, 217 insertions(+), 121 deletions(-) --- base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f change-id: 20260106-arm64-dpisa-2025-d6673ae6acee Best regards, -- Mark Brown <[email protected]>
