The currently listed SoCCP and SoCCP DTB reserved memory regions
don't align with the memory requested by the SoCCP Firmware. Fix
this by updating the SoCCP/SoCCP DTB memory regions to reflect the
memory region requirements of the SoCCP firmware, as described in
the Glymur v21 memory map release.
Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
Signed-off-by: Ananthu C V <[email protected]>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi
b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 20b49af7298e..9ec7c256b80a 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -602,13 +602,13 @@ spss_region_mem: spss@88a00000 {
no-map;
};
- soccpdtb_mem: soccpdtb@892e0000 {
- reg = <0x0 0x892e0000 0x0 0x20000>;
+ soccp_mem: soccp@88e00000 {
+ reg = <0x0 0x88e00000 0x0 0x400000>;
no-map;
};
- soccp_mem: soccp@89300000 {
- reg = <0x0 0x89300000 0x0 0x400000>;
+ soccpdtb_mem: soccpdtb@89200000 {
+ reg = <0x0 0x89200000 0x0 0x20000>;
no-map;
};
--
2.43.0
