Title: [5362] trunk/arch/blackfin/mach-bf548/head.S: remove non-bf54x ifdef logic since this file is only compiled on bf54x parts
- Revision
- 5362
- Author
- vapier
- Date
- 2008-09-30 00:42:59 -0500 (Tue, 30 Sep 2008)
Log Message
remove non-bf54x ifdef logic since this file is only compiled on bf54x parts
Modified Paths
Diff
Modified: trunk/arch/blackfin/mach-bf548/head.S (5361 => 5362)
--- trunk/arch/blackfin/mach-bf548/head.S 2008-09-29 20:04:46 UTC (rev 5361)
+++ trunk/arch/blackfin/mach-bf548/head.S 2008-09-30 05:42:59 UTC (rev 5362)
@@ -73,25 +73,19 @@
w[p0] = r0.l;
ssync;
-#if defined(CONFIG_BF54x)
+ /* enable self refresh via SRREQ */
P2.H = hi(EBIU_RSTCTL);
P2.L = lo(EBIU_RSTCTL);
R0 = [P2];
BITSET (R0, 3);
-#else
- P2.H = hi(EBIU_SDGCTL);
- P2.L = lo(EBIU_SDGCTL);
- R0 = [P2];
- BITSET (R0, 24);
-#endif
[P2] = R0;
SSYNC;
-#if defined(CONFIG_BF54x)
+
+ /* wait for SRACK bit to be set */
.LSRR_MODE:
R0 = [P2];
CC = BITTST(R0, 4);
if !CC JUMP .LSRR_MODE;
-#endif
r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */
r0 = r0 << 9; /* Shift it over, */
@@ -123,7 +117,7 @@
w[p0] = r0.l;
ssync;
-#if defined(CONFIG_BF54x)
+ /* disable self refresh by clearing SRREQ */
P2.H = hi(EBIU_RSTCTL);
P2.L = lo(EBIU_RSTCTL);
R0 = [P2];
@@ -155,42 +149,7 @@
r0.h = hi(mem_DDRCTL2);
[p0] = r0;
ssync;
-#else
- p0.l = lo(EBIU_SDRRC);
- p0.h = hi(EBIU_SDRRC);
- r0 = mem_SDRRC;
- w[p0] = r0.l;
- ssync;
- p0.l = LO(EBIU_SDBCTL);
- p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
- r0 = mem_SDBCTL;
- w[p0] = r0.l;
- ssync;
-
- P2.H = hi(EBIU_SDGCTL);
- P2.L = lo(EBIU_SDGCTL);
- R0 = [P2];
- BITCLR (R0, 24);
- p0.h = hi(EBIU_SDSTAT);
- p0.l = lo(EBIU_SDSTAT);
- r2.l = w[p0];
- cc = bittst(r2,3);
- if !cc jump .Lskip;
- NOP;
- BITSET (R0, 23);
-.Lskip:
- [P2] = R0;
- SSYNC;
-
- R0.L = lo(mem_SDGCTL);
- R0.H = hi(mem_SDGCTL);
- R1 = [p2];
- R1 = R1 | R0;
- [P2] = R1;
- SSYNC;
-#endif
-
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
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