Modified: trunk/drivers/mmc/host/mmc_spi.c (5774 => 5775)
--- trunk/drivers/mmc/host/mmc_spi.c 2008-12-01 23:25:28 UTC (rev 5774)
+++ trunk/drivers/mmc/host/mmc_spi.c 2008-12-02 03:22:13 UTC (rev 5775)
@@ -25,6 +25,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/hrtimer.h>
+#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/bio.h>
#include <linux/dma-mapping.h>
@@ -186,10 +187,11 @@
static int
mmc_spi_skip(struct mmc_spi_host *host, ktime_t timeout, unsigned n, u8 byte)
{
- u8 *cp = host->data->status;
+ u8 *cp = host->data->status;
+ struct timeval tv = ktime_to_timeval(timeout);
+ unsigned long timeout_jiffies = tv.tv_sec * HZ + (tv.tv_usec * HZ) / USEC_PER_SEC;
+ unsigned long starttime = jiffies;
- timeout = ktime_add(timeout, ktime_get());
-
while (1) {
int status;
unsigned i;
@@ -203,11 +205,14 @@
return cp[i];
}
- /* REVISIT investigate msleep() to avoid busy-wait I/O
- * in at least some cases.
- */
- if (ktime_to_ns(ktime_sub(ktime_get(), timeout)) > 0)
+ if ((jiffies - starttime) > timeout_jiffies)
break;
+
+ /* If we need long timeouts, we may release the CPU. */
+ /* We use jiffies here because we want to have a relation between
+ elapsed time and the blocking of the scheduler. */
+ if ((jiffies - starttime) > 1)
+ schedule();
}
return -ETIMEDOUT;
}
@@ -280,7 +285,9 @@
* It'd probably be better to memcpy() the first chunk and
* avoid extra i/o calls...
*/
- for (i = 2; i < 9; i++) {
+ /* Note we check for more than 8 bytes, because in practice,
+ some SD cards are slow... */
+ for (i = 2; i < 16; i++) {
value = mmc_spi_readbytes(host, 1);
if (value < 0)
goto done;
@@ -609,7 +616,16 @@
struct spi_device *spi = host->spi;
int status, i;
struct scratch *scratch = host->data;
+ u32 pattern;
+ /* The MMC framework does a good job of computing timeouts
+ according to the mmc/sd standard. However, we found that in
+ SPI mode, there are many cards which need a longer timeout
+ of 1s after receiving a long stream of write data. */
+ struct timeval tv = ktime_to_timeval(timeout);
+ if (tv.tv_sec == 0)
+ timeout = ktime_set(1, 0);
+
if (host->mmc->use_spi_crc)
scratch->crc_val = cpu_to_be16(
crc_itu_t(0, t->tx_buf, t->len));
@@ -636,8 +652,23 @@
* doesn't necessarily tell whether the write operation succeeded;
* it just says if the transmission was ok and whether *earlier*
* writes succeeded; see the standard.
+ *
+ * In practice, there are (even modern SDHC-)Cards which need
+ * some bits to send the response, so we have to cope with this
+ * situation and check the response bit-by-bit. Arggh!!!
*/
- switch (SPI_MMC_RESPONSE_CODE(scratch->status[0])) {
+ pattern = scratch->status[0] << 24;
+ pattern |= scratch->status[1] << 16;
+ pattern |= scratch->status[2] << 8;
+ pattern |= scratch->status[3];
+
+ /* left-adjust to leading 0 bit */
+ while (pattern & 0x80000000)
+ pattern <<= 1;
+ /* right-adjust for pattern matching. Code is in bit 4..0 now. */
+ pattern >>= 27;
+
+ switch (pattern) {
case SPI_RESPONSE_ACCEPTED:
status = 0;
break;
@@ -668,8 +699,8 @@
/* Return when not busy. If we didn't collect that status yet,
* we'll need some more I/O.
*/
- for (i = 1; i < sizeof(scratch->status); i++) {
- if (scratch->status[i] != 0)
+ for (i = 4; i < sizeof(scratch->status); i++) {
+ if (scratch->status[i] & 0x01)
return 0;
}
return mmc_spi_wait_unbusy(host, timeout);
@@ -1206,8 +1237,15 @@
* rising edge ... meaning SPI modes 0 or 3. So either SPI mode
* should be legit. We'll use mode 0 since it seems to be a
* bit less troublesome on some hardware ... unclear why.
+ *
+ * If the platform_data specifies mode 3, trust the platform_data
+ * and use this one. This allows for platforms which do not support
+ * mode 0.
*/
- spi->mode = SPI_MODE_0;
+ if (spi->mode != SPI_MODE_3)
+ /* set our default */
+ spi->mode = SPI_MODE_0;
+
spi->bits_per_word = 8;
status = spi_setup(spi);
