Title: [5858] trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c: convert CPP if statements to C if statements
- Revision
- 5858
- Author
- vapier
- Date
- 2008-12-12 14:36:23 -0600 (Fri, 12 Dec 2008)
Log Message
convert CPP if statements to C if statements
Modified Paths
Diff
Modified: trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c (5857 => 5858)
--- trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c 2008-12-12 20:23:52 UTC (rev 5857)
+++ trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c 2008-12-12 20:36:23 UTC (rev 5858)
@@ -68,10 +68,10 @@
}
/* Cover L1 memory. One 4M area for code and data each is enough. */
-#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
- d_tbl[i_d].addr = L1_DATA_A_START;
- d_tbl[i_d++].data = "" | PAGE_SIZE_4MB;
-#endif
+ if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
+ d_tbl[i_d].addr = L1_DATA_A_START;
+ d_tbl[i_d++].data = "" | PAGE_SIZE_4MB;
+ }
i_tbl[i_i].addr = L1_CODE_START;
i_tbl[i_i++].data = "" | PAGE_SIZE_4MB;
@@ -97,10 +97,10 @@
#endif
dcplb_bounds[i_d++].data = ""
/* DMA uncached region. */
-#if DMA_UNCACHED_REGION > 0
- dcplb_bounds[i_d].eaddr = _ramend;
- dcplb_bounds[i_d++].data = ""
-#endif
+ if (DMA_UNCACHED_REGION) {
+ dcplb_bounds[i_d].eaddr = _ramend;
+ dcplb_bounds[i_d++].data = ""
+ }
if (_ramend != physical_mem_end) {
/* Reserved memory. */
dcplb_bounds[i_d].eaddr = physical_mem_end;
@@ -114,14 +114,14 @@
dcplb_bounds[i_d].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE;
dcplb_bounds[i_d++].data = ""
-#ifdef L2_START
- /* Addressing hole up to L2 SRAM. */
- dcplb_bounds[i_d].eaddr = L2_START;
- dcplb_bounds[i_d++].data = ""
- /* L2 SRAM. */
- dcplb_bounds[i_d].eaddr = L2_START + L2_LENGTH;
- dcplb_bounds[i_d++].data = ""
-#endif
+ if (L2_LENGTH) {
+ /* Addressing hole up to L2 SRAM. */
+ dcplb_bounds[i_d].eaddr = L2_START;
+ dcplb_bounds[i_d++].data = ""
+ /* L2 SRAM. */
+ dcplb_bounds[i_d].eaddr = L2_START + L2_LENGTH;
+ dcplb_bounds[i_d++].data = ""
+ }
dcplb_bounds[i_d].eaddr = 0;
dcplb_nr_bounds = i_d;
@@ -135,24 +135,24 @@
#endif
icplb_bounds[i_i++].data = ""
/* DMA uncached region. */
-#if DMA_UNCACHED_REGION > 0
- icplb_bounds[i_i].eaddr = _ramend;
- icplb_bounds[i_i++].data = ""
-#endif
+ if (DMA_UNCACHED_REGION) {
+ icplb_bounds[i_i].eaddr = _ramend;
+ icplb_bounds[i_i++].data = ""
+ }
if (_ramend != physical_mem_end) {
/* Reserved memory. */
icplb_bounds[i_i].eaddr = physical_mem_end;
icplb_bounds[i_i++].data = "" ?
SDRAM_IGENERIC : SDRAM_INON_CHBL);
}
-#ifdef L2_START
- /* Addressing hole up to L2 SRAM, including the async bank. */
- icplb_bounds[i_i].eaddr = L2_START;
- icplb_bounds[i_i++].data = ""
- /* L2 SRAM. */
- icplb_bounds[i_i].eaddr = L2_START + L2_LENGTH;
- icplb_bounds[i_i++].data = ""
-#endif
+ if (L2_LENGTH) {
+ /* Addressing hole up to L2 SRAM, including the async bank. */
+ icplb_bounds[i_i].eaddr = L2_START;
+ icplb_bounds[i_i++].data = ""
+ /* L2 SRAM. */
+ icplb_bounds[i_i].eaddr = L2_START + L2_LENGTH;
+ icplb_bounds[i_i++].data = ""
+ }
icplb_bounds[i_i].eaddr = 0;
icplb_nr_bounds = i_i;
}
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