Title: [6022] trunk/arch/blackfin/mach-common: base SIC_IWR# programming on whether the MMR exists rather than having to maintain another list of processors
- Revision
- 6022
- Author
- vapier
- Date
- 2009-01-14 23:23:49 -0600 (Wed, 14 Jan 2009)
Log Message
base SIC_IWR# programming on whether the MMR exists rather than having to maintain another list of processors
Modified Paths
Diff
Modified: trunk/arch/blackfin/mach-common/ints-priority.c (6021 => 6022)
--- trunk/arch/blackfin/mach-common/ints-priority.c 2009-01-15 05:12:48 UTC (rev 6021)
+++ trunk/arch/blackfin/mach-common/ints-priority.c 2009-01-15 05:23:49 UTC (rev 6022)
@@ -1101,10 +1101,9 @@
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
- || defined(BF538_FAMILY) || defined(CONFIG_BF51x)
+#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
-#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
+# ifdef SIC_IWR1
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
@@ -1114,10 +1113,8 @@
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#else
- bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#endif
-# ifdef CONFIG_BF54x
+# endif
+# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
Modified: trunk/arch/blackfin/mach-common/pm.c (6021 => 6022)
--- trunk/arch/blackfin/mach-common/pm.c 2009-01-15 05:12:48 UTC (rev 6021)
+++ trunk/arch/blackfin/mach-common/pm.c 2009-01-15 05:23:49 UTC (rev 6022)
@@ -82,10 +82,9 @@
bfin_pm_standby_restore();
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
- defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
+#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
-#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
+# ifdef SIC_IWR1
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
@@ -95,10 +94,8 @@
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#else
- bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#endif
-# ifdef CONFIG_BF54x
+# endif
+# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
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