Title: [6965] trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c: Fix bug [#5324], cover coreb l1 sram cplb entris
- Revision
- 6965
- Author
- gyang
- Date
- 2009-07-10 06:34:51 -0500 (Fri, 10 Jul 2009)
Log Message
Fix bug [#5324], cover coreb l1 sram cplb entris
Modified Paths
Diff
Modified: trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c (6964 => 6965)
--- trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c 2009-07-10 10:34:32 UTC (rev 6964)
+++ trunk/arch/blackfin/kernel/cplb-nompu/cplbinit.c 2009-07-10 11:34:51 UTC (rev 6965)
@@ -72,13 +72,24 @@
}
/* Cover L1 memory. One 4M area for code and data each is enough. */
- if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
- d_tbl[i_d].addr = L1_DATA_A_START;
- d_tbl[i_d++].data = "" | PAGE_SIZE_4MB;
+ if (cpu == 0) {
+ if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
+ d_tbl[i_d].addr = L1_DATA_A_START;
+ d_tbl[i_d++].data = "" | PAGE_SIZE_4MB;
+ }
+ i_tbl[i_i].addr = L1_CODE_START;
+ i_tbl[i_i++].data = "" | PAGE_SIZE_4MB;
}
- i_tbl[i_i].addr = L1_CODE_START;
- i_tbl[i_i++].data = "" | PAGE_SIZE_4MB;
-
+#ifdef CONFIG_SMP
+ else {
+ if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
+ d_tbl[i_d].addr = COREB_L1_DATA_A_START;
+ d_tbl[i_d++].data = "" | PAGE_SIZE_4MB;
+ }
+ i_tbl[i_i].addr = COREB_L1_CODE_START;
+ i_tbl[i_i++].data = "" | PAGE_SIZE_4MB;
+ }
+#endif
first_switched_dcplb = i_d;
first_switched_icplb = i_i;
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