Diff
Modified: trunk/arch/blackfin/include/asm/bfin5xx_spi.h (7840 => 7841)
--- trunk/arch/blackfin/include/asm/bfin5xx_spi.h 2009-11-18 03:42:06 UTC (rev 7840)
+++ trunk/arch/blackfin/include/asm/bfin5xx_spi.h 2009-11-18 05:46:26 UTC (rev 7841)
@@ -109,7 +109,9 @@
#define CMD_SPI_GET_SYSTEMCLOCK 25
#define CMD_SPI_SET_WRITECONTINUOUS 26
-#define USE_GPIO_CS 0x8000
+#define MAX_CTRL_CS 8 /* cs in spi controller */
+#define MAX_GPIO_CS MAX_BLACKFIN_GPIOS /* gpio can be cs */
+
/* device.platform_data for SSP controller devices */
struct bfin5xx_spi_master {
u16 num_chipselect;
@@ -125,7 +127,6 @@
u8 enable_dma;
u8 bits_per_word;
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
- u32 cs_gpio;
/* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
u16 idle_tx_val;
u8 pio_interrupt; /* Enable spi data irq */
Modified: trunk/arch/blackfin/mach-bf537/boards/stamp.c (7840 => 7841)
--- trunk/arch/blackfin/mach-bf537/boards/stamp.c 2009-11-18 03:42:06 UTC (rev 7840)
+++ trunk/arch/blackfin/mach-bf537/boards/stamp.c 2009-11-18 05:46:26 UTC (rev 7841)
@@ -769,14 +769,12 @@
static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
.enable_dma = 1,
.bits_per_word = 8,
- .cs_gpio = GPIO_PF10,
};
#endif
#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
.bits_per_word = 16,
- .cs_gpio = GPIO_PF10,
};
#include <linux/spi/adf702x.h>
@@ -987,7 +985,7 @@
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.irq = IRQ_PF6,
.bus_num = 0,
- .chip_select = GPIO_PF10 | USE_GPIO_CS, /* GPIO controlled SSEL */
+ .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
.controller_data = &enc28j60_spi_chip_info,
.mode = SPI_MODE_0,
},
@@ -1009,7 +1007,7 @@
.modalias = "adf702x",
.max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
- .chip_select = GPIO_PF10 | USE_GPIO_CS, /* GPIO controlled SSEL */
+ .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
.controller_data = &adf7021_spi_chip_info,
.platform_data = &adf7021_platform_data,
.mode = SPI_MODE_0,
@@ -1021,7 +1019,7 @@
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
- .num_chipselect = 8,
+ .num_chipselect = MAX_CTRL_CS + MAX_GPIO_CS,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};
Modified: trunk/drivers/spi/spi_bfin5xx.c (7840 => 7841)
--- trunk/drivers/spi/spi_bfin5xx.c 2009-11-18 03:42:06 UTC (rev 7840)
+++ trunk/drivers/spi/spi_bfin5xx.c 2009-11-18 05:46:26 UTC (rev 7841)
@@ -185,7 +185,7 @@
/* Chip select operation functions for cs_change flag */
static void bfin_spi_cs_active(struct master_data *drv_data, struct slave_data *chip)
{
- if (likely(!(chip->chip_select_num & USE_GPIO_CS))) {
+ if (likely(chip->chip_select_num < MAX_CTRL_CS)) {
u16 flag = read_FLAG(drv_data);
flag &= ~chip->flag;
@@ -198,7 +198,7 @@
static void bfin_spi_cs_deactive(struct master_data *drv_data, struct slave_data *chip)
{
- if (likely(!(chip->chip_select_num & USE_GPIO_CS))) {
+ if (likely(chip->chip_select_num < MAX_CTRL_CS)) {
u16 flag = read_FLAG(drv_data);
flag |= chip->flag;
@@ -216,7 +216,7 @@
/* enable or disable the pin muxed by GPIO and SPI CS to work as SPI CS */
static inline void bfin_spi_cs_enable(struct master_data *drv_data, struct slave_data *chip)
{
- if (!(chip->chip_select_num & USE_GPIO_CS)) {
+ if (chip->chip_select_num < MAX_CTRL_CS) {
u16 flag = read_FLAG(drv_data);
flag |= (chip->flag >> 8);
@@ -227,7 +227,7 @@
static inline void bfin_spi_cs_disable(struct master_data *drv_data, struct slave_data *chip)
{
- if (!(chip->chip_select_num & USE_GPIO_CS)) {
+ if (chip->chip_select_num < MAX_CTRL_CS) {
u16 flag = read_FLAG(drv_data);
flag &= ~(chip->flag >> 8);
@@ -1108,7 +1108,6 @@
chip->ctl_reg = chip_info->ctl_reg;
chip->bits_per_word = chip_info->bits_per_word;
chip->cs_chg_udelay = chip_info->cs_chg_udelay;
- chip->cs_gpio = chip_info->cs_gpio;
chip->idle_tx_val = chip_info->idle_tx_val;
chip->pio_interrupt = chip_info->pio_interrupt;
}
@@ -1128,8 +1127,11 @@
* SPI_BAUD, not the real baudrate
*/
chip->baud = hz_to_spi_baud(spi->max_speed_hz);
- chip->flag = (1 << (spi->chip_select & ~USE_GPIO_CS)) << 8;
chip->chip_select_num = spi->chip_select;
+ if (chip->chip_select_num < MAX_CTRL_CS)
+ chip->flag = (1 << spi->chip_select) << 8;
+ else
+ chip->cs_gpio = chip->chip_select_num - MAX_CTRL_CS;
switch (chip->bits_per_word) {
case 8:
@@ -1190,7 +1192,7 @@
disable_irq(drv_data->spi_irq);
}
- if (chip->chip_select_num & USE_GPIO_CS) {
+ if (chip->chip_select_num >= MAX_CTRL_CS) {
ret = gpio_request(chip->cs_gpio, spi->modalias);
if (ret) {
dev_err(&spi->dev, "gpio_request() error\n");
@@ -1207,8 +1209,7 @@
spi_set_ctldata(spi, chip);
dev_dbg(&spi->dev, "chip select number is %d\n", chip->chip_select_num);
- if ((!(chip->chip_select_num & USE_GPIO_CS)) &&
- chip->chip_select_num <= spi->master->num_chipselect) {
+ if (chip->chip_select_num < MAX_CTRL_CS) {
ret = peripheral_request(ssel[spi->master->bus_num]
[chip->chip_select_num-1], spi->modalias);
if (ret) {
@@ -1223,7 +1224,7 @@
return 0;
pin_error:
- if (chip->chip_select_num & USE_GPIO_CS)
+ if (chip->chip_select_num >= MAX_CTRL_CS)
gpio_free(chip->cs_gpio);
else
peripheral_free(ssel[spi->master->bus_num]
@@ -1254,14 +1255,11 @@
if (!chip)
return;
- if ((!(chip->chip_select_num & USE_GPIO_CS))
- && (chip->chip_select_num <= spi->master->num_chipselect)) {
+ if (chip->chip_select_num < MAX_CTRL_CS) {
peripheral_free(ssel[spi->master->bus_num]
[chip->chip_select_num-1]);
bfin_spi_cs_disable(drv_data, chip);
- }
-
- if (chip->chip_select_num & USE_GPIO_CS)
+ } else
gpio_free(chip->cs_gpio);
kfree(chip);
