Modified: trunk/sound/soc/codecs/adau1371.c (8155 => 8156)
--- trunk/sound/soc/codecs/adau1371.c 2010-01-14 08:28:38 UTC (rev 8155)
+++ trunk/sound/soc/codecs/adau1371.c 2010-01-14 09:18:14 UTC (rev 8156)
@@ -32,72 +32,6 @@
struct snd_soc_codec codec;
};
-/*
- * read adau1371 register cache
- */
-static inline unsigned int adau1371_read_reg_cache(struct snd_soc_codec *codec,
- unsigned int reg)
-{
- u8 *cache = codec->reg_cache;
- if (reg == ADAU1371_RESET)
- return 0;
- else if (reg > ADAU1371_CACHEREGNUM)
- return -1;
- else
- return cache[reg];
-}
-
-/*
- * write adau1371 register cache
- */
-static inline void adau1371_write_reg_cache(struct snd_soc_codec *codec,
- unsigned int reg, u8 value)
-{
- u8 *cache = codec->reg_cache;
- if (reg >= ADAU1371_CACHEREGNUM)
- return;
- cache[reg] = value;
-}
-
-/*
- * write to the adau1371 register space
- */
-static int adau1371_write(struct snd_soc_codec *codec, unsigned int reg,
- unsigned int value)
-{
- u8 data[2] = { reg, value, };
-
- adau1371_write_reg_cache(codec, reg, value);
- if (codec->hw_write(codec->control_data, data, 2) == 2)
- return 0;
- else {
- dev_err(codec->dev, "%s: writing to %#x failed\n", codec->name, reg);
- return -EIO;
- }
-}
-
-/*
- * read from the adau1371 register space
- */
-static int adau1371_read(struct snd_soc_codec *codec, unsigned int reg)
-{
- u8 addr[1] = {(u8)reg};
- u8 buf[1] = {0};
-
- /* write the 1 byte read address */
- if (codec->hw_write(codec->control_data, addr, 1) != 1) {
- dev_err(codec->dev, "writing to 0x%x failed.\n", reg);
- return -EIO;
- }
- /* perform the read */
- if (i2c_master_recv(codec->control_data, buf, 1) != 1) {
- dev_err(codec->dev, "hw_read failed.\n");
- return -EIO;
- }
- adau1371_write_reg_cache(codec, reg, (unsigned int)buf[0]);
- return 0;
-}
-
static int adau1371_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
@@ -146,17 +80,17 @@
if (chip->out_chan_mask & PB_LINE) {
if (cache[ADAU1371_LLINEVOL + i] != vol) {
change = 1;
- adau1371_write(codec, ADAU1371_LLINEVOL + i, vol);
+ snd_soc_write(codec, ADAU1371_LLINEVOL + i, vol);
}
} else if (chip->out_chan_mask & PB_CD) {
if (cache[ADAU1371_LCDVOL + i] != vol) {
change = 1;
- adau1371_write(codec, ADAU1371_LCDVOL + i, vol);
+ snd_soc_write(codec, ADAU1371_LCDVOL + i, vol);
}
} else if (chip->out_chan_mask & PB_HP) {
if (cache[ADAU1371_LHPVOL + i] != vol) {
change = 1;
- adau1371_write(codec, ADAU1371_LHPVOL + i, vol);
+ snd_soc_write(codec, ADAU1371_LHPVOL + i, vol);
}
}
}
@@ -224,7 +158,7 @@
vol = clamp_t(int, ucontrol->value.integer.value[i], 0, 31);
if (cache[check] != vol) {
change = 1;
- adau1371_write(codec, check, vol);
+ snd_soc_write(codec, check, vol);
}
}
@@ -245,7 +179,7 @@
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- u8 reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLA);
+ u8 reg = snd_soc_read(codec, ADAU1371_PWRCTLA);
int curr = (reg & DAC_MUTE_MASK) >> 4;
int i;
@@ -262,7 +196,7 @@
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
int mute = 0;
int i;
- u8 reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLB);
+ u8 reg = snd_soc_read(codec, ADAU1371_PWRCTLB);
int curr = (reg & DAC_MUTE_MASK) >> 4;
for (i = 0; i < CHANNELS_OUTPUT; ++i)
@@ -270,7 +204,7 @@
mute |= (1 << i);
if (curr != mute) {
- adau1371_write(codec, ADAU1371_PWRCTLB, (reg & ~DAC_MUTE_MASK) | mute << 4);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, (reg & ~DAC_MUTE_MASK) | mute << 4);
return 1;
}
@@ -291,7 +225,7 @@
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- u8 reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLA);
+ u8 reg = snd_soc_read(codec, ADAU1371_PWRCTLA);
int curr = (reg & ADC_MUTE_MASK) >> 6;
int i;
@@ -308,7 +242,7 @@
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
int mute = 0;
int i;
- u8 reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLA);
+ u8 reg = snd_soc_read(codec, ADAU1371_PWRCTLA);
int curr = (reg & ADC_MUTE_MASK) >> 6;
for (i = 0; i < CHANNELS_INPUT; ++i)
@@ -316,7 +250,7 @@
mute |= (1 << i);
if (curr != mute) {
- adau1371_write(codec, ADAU1371_PWRCTLA,
+ snd_soc_write(codec, ADAU1371_PWRCTLA,
(reg & ~ADC_MUTE_MASK) | mute << 6);
return 1;
}
@@ -368,48 +302,48 @@
struct adau1371_priv *chip = codec->private_data;
u8 reg, *cache = codec->reg_cache;
- reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLA);
+ reg = snd_soc_read(codec, ADAU1371_PWRCTLA);
switch (ucontrol->value.integer.value[0]) {
case 0:
chip->in_chan_mask = CAP_INPA;
- adau1371_write(codec, ADAU1371_LADCMIX, AIN1_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RADCMIX, AIN1_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_INALVOL, cache[ADAU1371_INALVOL]);
- adau1371_write(codec, ADAU1371_INARVOL, cache[ADAU1371_INARVOL]);
+ snd_soc_write(codec, ADAU1371_LADCMIX, AIN1_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RADCMIX, AIN1_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_INALVOL, cache[ADAU1371_INALVOL]);
+ snd_soc_write(codec, ADAU1371_INARVOL, cache[ADAU1371_INARVOL]);
/* Disable other ports */
- adau1371_write(codec, ADAU1371_PWRCTLA,
+ snd_soc_write(codec, ADAU1371_PWRCTLA,
reg & ~(PWRCTLA_INBPD | PWRCTLA_INCPD | PWRCTLA_INDPD));
- adau1371_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INAPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INAPD);
break;
case 1:
chip->in_chan_mask = CAP_INPB;
- adau1371_write(codec, ADAU1371_LADCMIX, AIN2_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RADCMIX, AIN2_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_INBLVOL, cache[ADAU1371_INBLVOL]);
- adau1371_write(codec, ADAU1371_INBRVOL, cache[ADAU1371_INBRVOL]);
- adau1371_write(codec, ADAU1371_PWRCTLA,
+ snd_soc_write(codec, ADAU1371_LADCMIX, AIN2_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RADCMIX, AIN2_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_INBLVOL, cache[ADAU1371_INBLVOL]);
+ snd_soc_write(codec, ADAU1371_INBRVOL, cache[ADAU1371_INBRVOL]);
+ snd_soc_write(codec, ADAU1371_PWRCTLA,
reg & ~(PWRCTLA_INAPD | PWRCTLA_INCPD | PWRCTLA_INDPD));
- adau1371_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INBPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INBPD);
break;
case 2:
chip->in_chan_mask = CAP_INPC;
- adau1371_write(codec, ADAU1371_LADCMIX, AIN3_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RADCMIX, AIN3_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_INCLVOL, cache[ADAU1371_INCLVOL]);
- adau1371_write(codec, ADAU1371_INCRVOL, cache[ADAU1371_INCRVOL]);
- adau1371_write(codec, ADAU1371_PWRCTLA,
+ snd_soc_write(codec, ADAU1371_LADCMIX, AIN3_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RADCMIX, AIN3_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_INCLVOL, cache[ADAU1371_INCLVOL]);
+ snd_soc_write(codec, ADAU1371_INCRVOL, cache[ADAU1371_INCRVOL]);
+ snd_soc_write(codec, ADAU1371_PWRCTLA,
reg & ~(PWRCTLA_INAPD | PWRCTLA_INBPD | PWRCTLA_INDPD));
- adau1371_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INCPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INCPD);
break;
case 3:
chip->in_chan_mask = CAP_INPD;
- adau1371_write(codec, ADAU1371_LADCMIX, AIN4_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RADCMIX, AIN4_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_INDLVOL, cache[ADAU1371_INDLVOL]);
- adau1371_write(codec, ADAU1371_INDRVOL, cache[ADAU1371_INDRVOL]);
- adau1371_write(codec, ADAU1371_PWRCTLA,
+ snd_soc_write(codec, ADAU1371_LADCMIX, AIN4_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RADCMIX, AIN4_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_INDLVOL, cache[ADAU1371_INDLVOL]);
+ snd_soc_write(codec, ADAU1371_INDRVOL, cache[ADAU1371_INDRVOL]);
+ snd_soc_write(codec, ADAU1371_PWRCTLA,
reg & ~(PWRCTLA_INAPD | PWRCTLA_INBPD | PWRCTLA_INCPD));
- adau1371_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INDPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLA, reg | PWRCTLA_INDPD);
break;
}
@@ -459,39 +393,39 @@
if (ucontrol->value.enumerated.item[0] >= OUTPUT_NUMBER)
return -EINVAL;
- reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLB);
+ reg = snd_soc_read(codec, ADAU1371_PWRCTLB);
chip->out_chan_mask = 0;
switch (ucontrol->value.enumerated.item[0]) {
case 0:
chip->out_chan_mask = PB_LINE;
- adau1371_write(codec, ADAU1371_LLINEMIX, LDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RLINEMIX, RDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_LLINEVOL, cache[ADAU1371_LLINEVOL]);
- adau1371_write(codec, ADAU1371_RLINEVOL, cache[ADAU1371_RLINEVOL]);
+ snd_soc_write(codec, ADAU1371_LLINEMIX, LDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RLINEMIX, RDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_LLINEVOL, cache[ADAU1371_LLINEVOL]);
+ snd_soc_write(codec, ADAU1371_RLINEVOL, cache[ADAU1371_RLINEVOL]);
/* Disable other ports */
- adau1371_write(codec, ADAU1371_PWRCTLB,
+ snd_soc_write(codec, ADAU1371_PWRCTLB,
reg & ~(PWRCTLB_LCDPD | PWRCTLB_RCDPD | PWRCTLB_HPPD));
- adau1371_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_LLNPD | PWRCTLB_RLNPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_LLNPD | PWRCTLB_RLNPD);
break;
case 1:
chip->out_chan_mask = PB_CD;
- adau1371_write(codec, ADAU1371_LCDMIX, LDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RCDMIX, RDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_LCDVOL, cache[ADAU1371_LCDVOL]);
- adau1371_write(codec, ADAU1371_RCDVOL, cache[ADAU1371_RCDVOL]);
- adau1371_write(codec, ADAU1371_PWRCTLB,
+ snd_soc_write(codec, ADAU1371_LCDMIX, LDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RCDMIX, RDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_LCDVOL, cache[ADAU1371_LCDVOL]);
+ snd_soc_write(codec, ADAU1371_RCDVOL, cache[ADAU1371_RCDVOL]);
+ snd_soc_write(codec, ADAU1371_PWRCTLB,
reg & ~(PWRCTLB_LLNPD | PWRCTLB_RLNPD | PWRCTLB_HPPD));
- adau1371_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_LCDPD | PWRCTLB_RCDPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_LCDPD | PWRCTLB_RCDPD);
break;
case 2:
chip->out_chan_mask = PB_HP;
- adau1371_write(codec, ADAU1371_LHPMIX, LDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RHPMIX, RDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_LHPVOL, cache[ADAU1371_LHPVOL]);
- adau1371_write(codec, ADAU1371_RHPVOL, cache[ADAU1371_RHPVOL]);
- adau1371_write(codec, ADAU1371_PWRCTLB,
+ snd_soc_write(codec, ADAU1371_LHPMIX, LDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RHPMIX, RDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_LHPVOL, cache[ADAU1371_LHPVOL]);
+ snd_soc_write(codec, ADAU1371_RHPVOL, cache[ADAU1371_RHPVOL]);
+ snd_soc_write(codec, ADAU1371_PWRCTLB,
reg & ~(PWRCTLB_LLNPD | PWRCTLB_RLNPD | PWRCTLB_LCDPD | PWRCTLB_RCDPD));
- adau1371_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_HPPD);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg | PWRCTLB_HPPD);
break;
}
@@ -571,7 +505,7 @@
return 0;
}
-#define adau1371_reset(c) adau1371_write(c, ADAU1371_RESET, 0)
+#define adau1371_reset(c) snd_soc_write(c, ADAU1371_RESET, 0)
static inline int get_coeff(struct adau1371_priv *adau1371, int rate)
{
@@ -588,14 +522,14 @@
static void adau1371_set_drc(struct snd_soc_codec *codec, u8 *dsettings)
{
- adau1371_write(codec, ADAU1371_DRCCTL1, dsettings[0]);
- adau1371_write(codec, ADAU1371_DRCCTL2, dsettings[1]);
- adau1371_write(codec, ADAU1371_DRCSC1, dsettings[2]);
- adau1371_write(codec, ADAU1371_DRCSC2, dsettings[3]);
- adau1371_write(codec, ADAU1371_DRCSC3, dsettings[4]);
- adau1371_write(codec, ADAU1371_DRCGS1, dsettings[5]);
- adau1371_write(codec, ADAU1371_DRCGS2, dsettings[6]);
- adau1371_write(codec, ADAU1371_DRCGS3, dsettings[7]);
+ snd_soc_write(codec, ADAU1371_DRCCTL1, dsettings[0]);
+ snd_soc_write(codec, ADAU1371_DRCCTL2, dsettings[1]);
+ snd_soc_write(codec, ADAU1371_DRCSC1, dsettings[2]);
+ snd_soc_write(codec, ADAU1371_DRCSC2, dsettings[3]);
+ snd_soc_write(codec, ADAU1371_DRCSC3, dsettings[4]);
+ snd_soc_write(codec, ADAU1371_DRCGS1, dsettings[5]);
+ snd_soc_write(codec, ADAU1371_DRCGS2, dsettings[6]);
+ snd_soc_write(codec, ADAU1371_DRCGS3, dsettings[7]);
}
@@ -619,40 +553,40 @@
/* Divide PLL output(48k * 1024 or 44.1k * 1024) to get wanted rate */
switch (params_rate(params)) {
case 96000:
- adau1371_write(codec, ADAU1371_CLKSDIV, (1 << CLKSDIV_CLKDIV_SHIFT));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (1 << CLKSDIV_CLKDIV_SHIFT));
break;
case 48000:
- adau1371_write(codec, ADAU1371_CLKSDIV, (3 << CLKSDIV_CLKDIV_SHIFT));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (3 << CLKSDIV_CLKDIV_SHIFT));
break;
case 44100:
- adau1371_write(codec, ADAU1371_CLKSDIV, (3 << CLKSDIV_CLKDIV_SHIFT));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (3 << CLKSDIV_CLKDIV_SHIFT));
break;
case 22050:
- adau1371_write(codec, ADAU1371_CLKSDIV, (7 << CLKSDIV_CLKDIV_SHIFT));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (7 << CLKSDIV_CLKDIV_SHIFT));
break;
case 16000:
- adau1371_write(codec, ADAU1371_CLKSDIV, (5 << CLKSDIV_CLKDIV_SHIFT | 1));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (5 << CLKSDIV_CLKDIV_SHIFT | 1));
break;
case 8000:
- adau1371_write(codec, ADAU1371_CLKSDIV, (5 << CLKSDIV_CLKDIV_SHIFT | 3));
+ snd_soc_write(codec, ADAU1371_CLKSDIV, (5 << CLKSDIV_CLKDIV_SHIFT | 3));
break;
default:
dev_err(codec->dev, "rate : %d isn't supported\n", params_rate(params));
break;
}
- reg = adau1371_read_reg_cache(codec, ADAU1371_CLKSDIV);
- adau1371_write(codec, ADAU1371_CLKSDIV, reg & ~CLKSDIV_COREN);
+ reg = snd_soc_read(codec, ADAU1371_CLKSDIV);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg & ~CLKSDIV_COREN);
/* Set PLL */
- adau1371_write(codec, ADAU1371_PLLCTLB, 0x00);
- adau1371_write(codec, ADAU1371_PLLMHI,
+ snd_soc_write(codec, ADAU1371_PLLCTLB, 0x00);
+ snd_soc_write(codec, ADAU1371_PLLMHI,
((pll_settings + i)->m & 0xff00) >> 8);
- adau1371_write(codec, ADAU1371_PLLMLOW, (pll_settings + i)->m
+ snd_soc_write(codec, ADAU1371_PLLMLOW, (pll_settings + i)->m
& 0xff);
- adau1371_write(codec, ADAU1371_PLLNHI,
+ snd_soc_write(codec, ADAU1371_PLLNHI,
((pll_settings + i)->n & 0xff00) >> 8);
- adau1371_write(codec, ADAU1371_PLLNLOW, (pll_settings + i)->n
+ snd_soc_write(codec, ADAU1371_PLLNLOW, (pll_settings + i)->n
& 0xff);
- adau1371_write(codec, ADAU1371_PLLCTLA, (pll_settings + i)->integer << 3 |
+ snd_soc_write(codec, ADAU1371_PLLCTLA, (pll_settings + i)->integer << 3 |
(pll_settings + i)->input_div << 1 | (pll_settings + i)->type);
/* bit size */
@@ -673,9 +607,9 @@
dai_ctl = 0;
break;
}
- reg = adau1371_read_reg_cache(codec, ADAU1371_DAIACTL);
- adau1371_write(codec, ADAU1371_DAIACTL, reg | dai_ctl);
- adau1371_write(codec, ADAU1371_PLLCTLB, PLLCTLB_PLLEN);
+ reg = snd_soc_read(codec, ADAU1371_DAIACTL);
+ snd_soc_write(codec, ADAU1371_DAIACTL, reg | dai_ctl);
+ snd_soc_write(codec, ADAU1371_PLLCTLB, PLLCTLB_PLLEN);
return 0;
}
@@ -693,8 +627,8 @@
do {
++counter;
schedule_timeout_interruptible(msecs_to_jiffies(1));
- adau1371_read(codec, ADAU1371_PLLCTLB);
- } while (((adau1371_read_reg_cache(codec, ADAU1371_PLLCTLB)) & 0x02) == 0
+ snd_soc_read(codec, ADAU1371_PLLCTLB);
+ } while (((snd_soc_read(codec, ADAU1371_PLLCTLB)) & 0x02) == 0
&& counter < 20);
if (counter >= 20) {
dev_err(codec->dev, "failed to initialize PLL\n");
@@ -702,11 +636,11 @@
}
/* Use DAI A */
- adau1371_write(codec, ADAU1371_SRCDAICTL, SRCDAICTL_DAIA_ENA);
+ snd_soc_write(codec, ADAU1371_SRCDAICTL, SRCDAICTL_DAIA_ENA);
udelay(10);
- reg = adau1371_read_reg_cache(codec, ADAU1371_CLKSDIV);
- adau1371_write(codec, ADAU1371_CLKSDIV, reg | CLKSDIV_COREN);
+ reg = snd_soc_read(codec, ADAU1371_CLKSDIV);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg | CLKSDIV_COREN);
return 0;
}
@@ -719,12 +653,12 @@
struct snd_soc_codec *codec = socdev->card->codec;
u8 reg;
- reg = adau1371_read_reg_cache(codec, ADAU1371_CLKSDIV);
+ reg = snd_soc_read(codec, ADAU1371_CLKSDIV);
/* deactivate */
if (!codec->active)
- adau1371_write(codec, ADAU1371_CLKSDIV, reg & ~CLKSDIV_COREN);
- adau1371_write(codec, ADAU1371_PLLCTLB, 0x0);
- adau1371_write(codec, ADAU1371_SRCDAICTL, 0x0);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg & ~CLKSDIV_COREN);
+ snd_soc_write(codec, ADAU1371_PLLCTLB, 0x0);
+ snd_soc_write(codec, ADAU1371_SRCDAICTL, 0x0);
}
static int adau1371_mute(struct snd_soc_dai *dai, int mute)
@@ -732,11 +666,11 @@
struct snd_soc_codec *codec = dai->codec;
u8 reg;
- reg = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLB);
+ reg = snd_soc_read(codec, ADAU1371_PWRCTLB);
if (mute)
- adau1371_write(codec, ADAU1371_PWRCTLB, reg & ~DAC_MUTE_MASK);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg & ~DAC_MUTE_MASK);
else
- adau1371_write(codec, ADAU1371_PWRCTLB, reg | DAC_MUTE_MASK);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg | DAC_MUTE_MASK);
return 0;
}
@@ -805,7 +739,7 @@
}
/* set DAIA */
- adau1371_write(codec, ADAU1371_DAIACTL, dai_ctl);
+ snd_soc_write(codec, ADAU1371_DAIACTL, dai_ctl);
return 0;
}
@@ -815,23 +749,23 @@
{
u8 reg_pwr, reg_clk;
- reg_pwr = adau1371_read_reg_cache(codec, ADAU1371_PWRCTLB);
- reg_clk = adau1371_read_reg_cache(codec, ADAU1371_CLKSDIV);
+ reg_pwr = snd_soc_read(codec, ADAU1371_PWRCTLB);
+ reg_clk = snd_soc_read(codec, ADAU1371_CLKSDIV);
switch (level) {
case SND_SOC_BIAS_ON:
- adau1371_write(codec, ADAU1371_PWRCTLB, reg_pwr | PWRCTLB_PWDB);
- adau1371_write(codec, ADAU1371_CLKSDIV, reg_clk | CLKSDIV_COREN);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg_pwr | PWRCTLB_PWDB);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg_clk | CLKSDIV_COREN);
/* vref/mid, osc on, dac unmute */
break;
case SND_SOC_BIAS_PREPARE:
break;
case SND_SOC_BIAS_STANDBY:
/* everything off except vref/vmid, */
- adau1371_write(codec, ADAU1371_CLKSDIV, reg_clk & ~CLKSDIV_COREN);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg_clk & ~CLKSDIV_COREN);
break;
case SND_SOC_BIAS_OFF:
- adau1371_write(codec, ADAU1371_PWRCTLB, reg_pwr & ~PWRCTLB_PWDB);
- adau1371_write(codec, ADAU1371_CLKSDIV, reg_clk & ~CLKSDIV_COREN);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg_pwr & ~PWRCTLB_PWDB);
+ snd_soc_write(codec, ADAU1371_CLKSDIV, reg_clk & ~CLKSDIV_COREN);
break;
}
codec->bias_level = level;
@@ -907,7 +841,7 @@
* initialise the adau1371 driver
* register the mixer and dsp interfaces with the kernel
*/
-static int adau1371_register(struct adau1371_priv *adau1371)
+static int adau1371_register(struct adau1371_priv *adau1371, enum snd_soc_control_type control)
{
struct snd_soc_codec *codec = &adau1371->codec;
int ret = 0;
@@ -918,8 +852,6 @@
codec->name = "adau1371";
codec->owner = THIS_MODULE;
- codec->read = adau1371_read_reg_cache;
- codec->write = adau1371_write;
codec->set_bias_level = adau1371_set_bias_level;
codec->dai = &adau1371_dai;
codec->num_dai = 1;
@@ -927,6 +859,11 @@
codec->reg_cache = kzalloc(ADAU1371_CACHEREGNUM, GFP_KERNEL);
if (codec->reg_cache == NULL)
return -ENOMEM;
+ ret = snd_soc_codec_set_cache_io(codec, 8, 8, control);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
+ return ret;
+ }
ret = snd_soc_register_codec(codec);
if (ret != 0) {
@@ -968,46 +905,46 @@
adau1371->in_chan_mask = CAP_INPA;
/* Playback mix settings, line out switched to DACs */
- adau1371_write(codec, ADAU1371_LLINEMIX, LDAC_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RLINEMIX, RDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_LLINEMIX, LDAC_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RLINEMIX, RDAC_SIGNAL_ENA);
/* Line out volume gain:10 db by default */
- adau1371_write(codec, ADAU1371_LLINEVOL, 0x17);
- adau1371_write(codec, ADAU1371_RLINEVOL, 0x17);
- adau1371_write(codec, ADAU1371_DAIAPBLVOL, 0x80);
- adau1371_write(codec, ADAU1371_DAIAPBRVOL, 0x80);
+ snd_soc_write(codec, ADAU1371_LLINEVOL, 0x17);
+ snd_soc_write(codec, ADAU1371_RLINEVOL, 0x17);
+ snd_soc_write(codec, ADAU1371_DAIAPBLVOL, 0x80);
+ snd_soc_write(codec, ADAU1371_DAIAPBRVOL, 0x80);
/* Capture mix settings, AIN1 switched to ADCs */
- adau1371_write(codec, ADAU1371_LADCMIX, AIN1_SIGNAL_ENA);
- adau1371_write(codec, ADAU1371_RADCMIX, AIN1_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_LADCMIX, AIN1_SIGNAL_ENA);
+ snd_soc_write(codec, ADAU1371_RADCMIX, AIN1_SIGNAL_ENA);
/* Input volume gain:10 db by default */
- adau1371_write(codec, ADAU1371_INPUTMODE, 0x00);
- adau1371_write(codec, ADAU1371_INALVOL, 0x17);
- adau1371_write(codec, ADAU1371_INARVOL, 0x17);
- adau1371_write(codec, ADAU1371_DAIRECLVOL, 0x80);
- adau1371_write(codec, ADAU1371_DAIRECRVOL, 0x80);
+ snd_soc_write(codec, ADAU1371_INPUTMODE, 0x00);
+ snd_soc_write(codec, ADAU1371_INALVOL, 0x17);
+ snd_soc_write(codec, ADAU1371_INARVOL, 0x17);
+ snd_soc_write(codec, ADAU1371_DAIRECLVOL, 0x80);
+ snd_soc_write(codec, ADAU1371_DAIRECRVOL, 0x80);
/* Should be set on REVB to enable ADCs */
- adau1371_write(codec, ADAU1371_CODECCTL, 0x10);
+ snd_soc_write(codec, ADAU1371_CODECCTL, 0x10);
/* 64 bits per frame */
- adau1371_write(codec, ADAU1371_BCLKDIV, BCLKDIV_BPFA64);
+ snd_soc_write(codec, ADAU1371_BCLKDIV, BCLKDIV_BPFA64);
/* PWR on input port A,right and left ADCs */
reg = PWRCTLA_INAPD | PWRCTLA_MICBPD | PWRCTLA_LADCPD | PWRCTLA_RADCPD;
- adau1371_write(codec, ADAU1371_PWRCTLA, reg);
+ snd_soc_write(codec, ADAU1371_PWRCTLA, reg);
/* PWR on line out,right and left DACs and whole chip */
reg = PWRCTLB_RLNPD | PWRCTLB_LLNPD | PWRCTLB_RDACPD |
PWRCTLB_LDACPD | PWRCTLB_PWDB;
- adau1371_write(codec, ADAU1371_PWRCTLB, reg);
+ snd_soc_write(codec, ADAU1371_PWRCTLB, reg);
/* Increase the driven ability of DAIA, maybe not necessary in real use */
- adau1371_write(codec, ADAU1371_PAD_CTL, PADCTL_DAIA);
+ snd_soc_write(codec, ADAU1371_PAD_CTL, PADCTL_DAIA);
/* Enable Dynamic range control */
adau1371_set_drc(codec, adau1371->data->drc_settings);
- adau1371_write(codec, ADAU1371_DRCMODE,
+ snd_soc_write(codec, ADAU1371_DRCMODE,
DRCMODE_RIGHT_ENA | DRCMODE_LEFT_ENA | DRCMODE_NGEN);
/* Playback signal input */
- adau1371_write(codec, ADAU1371_DSPMODE, DSPMODE_PLAYBACK_ENA);
+ snd_soc_write(codec, ADAU1371_DSPMODE, DSPMODE_PLAYBACK_ENA);
/* Enable playback, capture and DSP function */
- adau1371_write(codec, ADAU1371_DIGEN, DIGEN_PBEN | DIGEN_RECEN | DIGEN_FDSPEN);
+ snd_soc_write(codec, ADAU1371_DIGEN, DIGEN_PBEN | DIGEN_RECEN | DIGEN_FDSPEN);
return 0;
@@ -1092,7 +1029,7 @@
codec->dev = &i2c->dev;
adau1371_codec = codec;
- ret = adau1371_register(adau1371);
+ ret = adau1371_register(adau1371, SND_SOC_I2C);
if (ret < 0)
dev_err(&i2c->dev, "failed to initialize\n");
