Title: [9393] trunk/arch/blackfin/mach-bf548/include/mach/dma.h: [#6048] : bfin_dma : default UART2 and UART3 dma channel and irq
- Revision
- 9393
- Author
- steven.miao
- Date
- 2010-10-25 00:21:08 -0400 (Mon, 25 Oct 2010)
Log Message
[#6048] : bfin_dma : default UART2 and UART3 dma channel and irq
define default dma channel and irq MACRO for UART2,UART3 on bf548
Modified Paths
Diff
Modified: trunk/arch/blackfin/mach-bf548/include/mach/dma.h (9392 => 9393)
--- trunk/arch/blackfin/mach-bf548/include/mach/dma.h 2010-10-25 04:12:34 UTC (rev 9392)
+++ trunk/arch/blackfin/mach-bf548/include/mach/dma.h 2010-10-25 04:21:08 UTC (rev 9393)
@@ -34,38 +34,28 @@
#define CH_NFC 22
#define CH_SPI2 23
-#if defined(CONFIG_UART2_DMA_RX_ON_DMA18)
-#define CH_UART2_RX 18
-#define IRQ_UART2_RX BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */
-#define CH_UART2_TX 19
-#define IRQ_UART2_TX BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */
-#elif defined(CONFIG_UART2_DMA_RX_ON_DMA13)
+#if defined(CONFIG_UART2_DMA_RX_ON_DMA13)
#define CH_UART2_RX 13
#define IRQ_UART2_RX BFIN_IRQ(37) /* UART2 RX USE EPP1 (DMA13) Interrupt */
#define CH_UART2_TX 14
#define IRQ_UART2_TX BFIN_IRQ(38) /* UART2 RX USE EPP1 (DMA14) Interrupt */
-#else
-#undef CH_UART2_RX
-#undef IRQ_UART2_RX
-#undef CH_UART2_TX
-#undef IRQ_UART2_TX
+#else /* Default USE SPORT2's DMA Channel */
+#define CH_UART2_RX 18
+#define IRQ_UART2_RX BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */
+#define CH_UART2_TX 19
+#define IRQ_UART2_TX BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */
#endif
-#if defined(CONFIG_UART3_DMA_RX_ON_DMA20)
-#define CH_UART3_RX 20
-#define IRQ_UART3_RX BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */
-#define CH_UART3_TX 21
-#define IRQ_UART3_TX BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */
-#elif defined(CONFIG_UART3_DMA_RX_ON_DMA15)
+#if defined(CONFIG_UART3_DMA_RX_ON_DMA15)
#define CH_UART3_RX 15
#define IRQ_UART3_RX BFIN_IRQ(64) /* UART3 RX USE PIXC IN0 (DMA15) Interrupt */
#define CH_UART3_TX 16
#define IRQ_UART3_TX BFIN_IRQ(65) /* UART3 TX USE PIXC IN1 (DMA16) Interrupt */
-#else
-#undef CH_UART3_RX
-#undef IRQ_UART3_RX
-#undef CH_UART3_TX
-#undef IRQ_UART3_TX
+#else /* Default USE SPORT3's DMA Channel */
+#define CH_UART3_RX 20
+#define IRQ_UART3_RX BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */
+#define CH_UART3_TX 21
+#define IRQ_UART3_TX BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */
#endif
#define CH_MEM_STREAM0_DEST 24
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