Diff
Modified: trunk/sound/soc/blackfin/Kconfig (9764 => 9765)
--- trunk/sound/soc/blackfin/Kconfig 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/blackfin/Kconfig 2011-03-24 10:27:39 UTC (rev 9765)
@@ -18,36 +18,21 @@
Say Y if you want to add support for SoC audio on BF527-EZKIT.
config SND_BF5XX_SOC_AD73311
- tristate "SoC AD73311/AD74111 Audio support for Blackfin"
+ tristate "SoC AD73311 Audio support for Blackfin"
depends on SND_BF5XX_I2S
select SND_BF5XX_SOC_I2S
select SND_SOC_AD73311
help
Say Y if you want to add support for AD73311 codec on Blackfin.
-config SND_BFIN_AD73311_SE
- int "PF pin for AD73311L Chip Select"
- depends on SND_BF5XX_SOC_AD73311
- default 4
+config SND_BF5XX_SOC_AD74111
+ tristate "SoC AD74111 Audio support for Blackfin"
+ depends on SND_BF5XX_I2S
+ select SND_BF5XX_SOC_I2S
+ select SND_SOC_AD74111
help
- Enter the GPIO used to control AD73311's SE pin. Acceptable
- values are 0 to 7
+ Say Y if you want to add support for AD74111 codec on Blackfin.
-config SND_BFIN_AD73311_RESET
- int "RESET pin for AD73311L Chip Select"
- depends on SND_BF5XX_SOC_AD73311
- default 4
- help
- Enter the GPIO used to control AD73311's RESET pin. Acceptable
- values are 0 to 7
-
-config SND_AD7XXXX_SELECT
- int "Select AD73311 or AD74111"
- depends on SND_SOC_AD73311
- default 0
- help
- Set 0 for AD73311, 1 for AD74111.
-
config SND_BF5XX_SOC_ADAU1361
tristate "SoC ADAU1361 Audio support"
depends on SND_BF5XX_I2S
@@ -140,16 +125,6 @@
endchoice
-config SND_BF5XX_RESET_GPIO_NUM
- int "Set a GPIO for cold reset"
- depends on SND_BF5XX_HAVE_COLD_RESET
- range 0 159
- default 19 if BFIN548_EZKIT
- default 5 if BFIN537_STAMP
- default 0
- help
- Set the correct GPIO for RESET the sound chip.
-
config SND_BF5XX_SOC_SPORT
tristate
Modified: trunk/sound/soc/blackfin/Makefile (9764 => 9765)
--- trunk/sound/soc/blackfin/Makefile 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/blackfin/Makefile 2011-03-24 10:27:39 UTC (rev 9765)
@@ -15,6 +15,7 @@
snd-ad183x-objs := bf5xx-ad183x.o
snd-ssm2602-objs := bf5xx-ssm2602.o
snd-ad73311-objs := bf5xx-ad73311.o
+snd-ad74111-objs := bf5xx-ad74111.o
snd-ad193x-objs := bf5xx-ad193x.o
snd-adau1361-objs := bf5xx-adau1361.o
snd-adau1373-objs := bf5xx-adau1373.o
@@ -25,6 +26,7 @@
obj-$(CONFIG_SND_BF5XX_SOC_AD183X) += snd-ad183x.o
obj-$(CONFIG_SND_BF5XX_SOC_SSM2602) += snd-ssm2602.o
obj-$(CONFIG_SND_BF5XX_SOC_AD73311) += snd-ad73311.o
+obj-$(CONFIG_SND_BF5XX_SOC_AD74111) += snd-ad74111.o
obj-$(CONFIG_SND_BF5XX_SOC_AD193X) += snd-ad193x.o
obj-$(CONFIG_SND_BF5XX_SOC_ADAU1361) += snd-adau1361.o
obj-$(CONFIG_SND_BF5XX_SOC_ADAU1373) += snd-adau1373.o
Modified: trunk/sound/soc/blackfin/bf5xx-ad73311.c (9764 => 9765)
--- trunk/sound/soc/blackfin/bf5xx-ad73311.c 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/blackfin/bf5xx-ad73311.c 2011-03-24 10:27:39 UTC (rev 9765)
@@ -61,8 +61,8 @@
#define bfin_read_SPORT_STAT bfin_read_SPORT1_STAT
#endif
-#define GPIO_SE CONFIG_SND_BFIN_AD73311_SE
-#define GPIO_RESET CONFIG_SND_BFIN_AD73311_RESET
+#define GPIO_SE 4
+#define GPIO_RESET 4
static struct snd_soc_card bf5xx_ad73311;
@@ -84,11 +84,10 @@
static int snd_ad73311_configure(struct ad73311_snd_ctrls *ctrl)
{
- unsigned short ctrl_regs[7];
+ unsigned short ctrl_regs[6];
unsigned short status = 0;
int count = 0;
-#if CONFIG_SND_AD7XXXX_SELECT == 0
/* DMCLK = MCLK = 16.384 MHz
* SCLK = DMCLK/8 = 2.048 MHz
* Sample Rate = DMCLK/2048 = 8 KHz
@@ -102,23 +101,7 @@
ctrl_regs[3] = AD_CONTROL | AD_WRITE | CTRL_REG_E | REGE_DA(0x1f);
ctrl_regs[4] = AD_CONTROL | AD_WRITE | CTRL_REG_F | REGF_SEEN(ctrl->se_en);
ctrl_regs[5] = AD_CONTROL | AD_WRITE | CTRL_REG_A | REGA_MODE_DATA;
-#elif CONFIG_SND_AD7XXXX_SELECT == 1
- /* MCLK = MCLK = 12.288 MHz
- * Sample Rate = 8 KHz
- * IMCLK = MCLK/6 = 2.048 MHz = 8kHz * 256
- */
- ctrl_regs[0] = AD_WRITE | CTRL_REG_A | REGA_REFAMP | REGA_REF |\
- REGA_DAC | REGA_ADC_INPAMP;
- ctrl_regs[1] = AD_WRITE | CTRL_REG_B | REGB_FCLKDIV(2) | \
- REGB_SCLKDIV(1) | REGB_TCLKDIV(0);
- ctrl_regs[2] = AD_WRITE | CTRL_REG_C | REGC_ADC_HP | \
- REGC_WORD_WIDTH(0);
- ctrl_regs[3] = AD_WRITE | CTRL_REG_D | REGD_MASTER | \
- REGD_FDCLK | REGD_DSP_MODE;
- ctrl_regs[4] = AD_WRITE | CTRL_REG_E;
- ctrl_regs[5] = AD_WRITE | CTRL_REG_F;
- ctrl_regs[6] = AD_WRITE | CTRL_REG_G;
-#endif
+
local_irq_disable();
snd_ad73311_reset();
snd_ad73311_startup();
@@ -178,6 +161,7 @@
printk(KERN_ERR "%s: Failed ro request GPIO_%d\n", __func__, GPIO_SE);
return -EBUSY;
}
+ gpio_direction_output(GPIO_SE, 0);
if (GPIO_SE != GPIO_RESET) {
if (gpio_request(GPIO_RESET, "AD73311_RESET")) {
@@ -185,11 +169,9 @@
gpio_free(GPIO_SE);
return -EBUSY;
}
+ gpio_direction_output(GPIO_RESET, 0);
}
- gpio_direction_output(GPIO_SE, 0);
- gpio_direction_output(GPIO_RESET, 0);
-
err = snd_ad73311_configure(&ctrl);
if (err < 0)
return -EFAULT;
@@ -216,7 +198,6 @@
return 0;
}
-
static struct snd_soc_ops bf5xx_ad73311_ops = {
.hw_params = bf5xx_ad73311_hw_params,
};
Added: trunk/sound/soc/blackfin/bf5xx-ad74111.c (0 => 9765)
--- trunk/sound/soc/blackfin/bf5xx-ad74111.c (rev 0)
+++ trunk/sound/soc/blackfin/bf5xx-ad74111.c 2011-03-24 10:27:39 UTC (rev 9765)
@@ -0,0 +1,251 @@
+/*
+ * File: sound/soc/blackfin/bf5xx-ad74111.c
+ * Author: Cliff Cai <[email protected]>
+ *
+ * Created: Thur Sep 25 2008
+ * Description: Board driver for ad74111 sound chip
+ *
+ * Modified:
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Bugs: Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/pcm_params.h>
+
+#include <asm/blackfin.h>
+#include <asm/cacheflush.h>
+#include <asm/irq.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+
+#include "../codecs/ad74111.h"
+#include "bf5xx-sport.h"
+#include "bf5xx-i2s-pcm.h"
+
+#if CONFIG_SND_BF5XX_SPORT_NUM == 0
+#define bfin_write_SPORT_TCR1 bfin_write_SPORT0_TCR1
+#define bfin_read_SPORT_TCR1 bfin_read_SPORT0_TCR1
+#define bfin_write_SPORT_TCR2 bfin_write_SPORT0_TCR2
+#define bfin_write_SPORT_TX16 bfin_write_SPORT0_TX16
+#define bfin_read_SPORT_STAT bfin_read_SPORT0_STAT
+#else
+#define bfin_write_SPORT_TCR1 bfin_write_SPORT1_TCR1
+#define bfin_read_SPORT_TCR1 bfin_read_SPORT1_TCR1
+#define bfin_write_SPORT_TCR2 bfin_write_SPORT1_TCR2
+#define bfin_write_SPORT_TX16 bfin_write_SPORT1_TX16
+#define bfin_read_SPORT_STAT bfin_read_SPORT1_STAT
+#endif
+
+#define GPIO_SE 4
+#define GPIO_RESET 4
+
+static struct snd_soc_card bf5xx_ad74111;
+
+static void snd_ad74111_reset(void)
+{
+ gpio_set_value(GPIO_RESET, 0);
+ udelay(100);
+ gpio_set_value(GPIO_RESET, 1);
+}
+
+static void snd_ad74111_startup(void)
+{
+ pr_debug("%s enter\n", __func__);
+
+ /* Pull up SE pin on AD74111L */
+ gpio_set_value(GPIO_SE, 1);
+ udelay(1);
+}
+
+static int snd_ad74111_configure(void)
+{
+ unsigned short ctrl_regs[7];
+ unsigned short status = 0;
+ int count = 0;
+
+ /* MCLK = MCLK = 12.288 MHz
+ * Sample Rate = 8 KHz
+ * IMCLK = MCLK/6 = 2.048 MHz = 8kHz * 256
+ */
+ ctrl_regs[0] = AD_WRITE | CTRL_REG_A | REGA_REFAMP | REGA_REF |\
+ REGA_DAC | REGA_ADC_INPAMP;
+ ctrl_regs[1] = AD_WRITE | CTRL_REG_B | REGB_FCLKDIV(2) | \
+ REGB_SCLKDIV(1) | REGB_TCLKDIV(0);
+ ctrl_regs[2] = AD_WRITE | CTRL_REG_C | REGC_ADC_HP | \
+ REGC_WORD_WIDTH(0);
+ ctrl_regs[3] = AD_WRITE | CTRL_REG_D | REGD_MASTER | \
+ REGD_FDCLK | REGD_DSP_MODE;
+ ctrl_regs[4] = AD_WRITE | CTRL_REG_E;
+ ctrl_regs[5] = AD_WRITE | CTRL_REG_F;
+ ctrl_regs[6] = AD_WRITE | CTRL_REG_G;
+
+ local_irq_disable();
+ snd_ad74111_reset();
+ snd_ad74111_startup();
+
+ bfin_write_SPORT_TCR1(TFSR);
+ bfin_write_SPORT_TCR2(0xF);
+ SSYNC();
+
+ /* SPORT Tx Register is a 8 x 16 FIFO, all the data can be put to
+ * FIFO before enable SPORT to transfer the data
+ */
+ for (count = 0; count < 6; count++)
+ bfin_write_SPORT_TX16(ctrl_regs[count]);
+ SSYNC();
+ bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() | TSPEN);
+ SSYNC();
+
+ /* When TUVF is set, the data is already send out */
+ while (!(status & TUVF) && ++count < 10000) {
+ udelay(1);
+ status = bfin_read_SPORT_STAT();
+ SSYNC();
+ }
+ bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() & ~TSPEN);
+ SSYNC();
+ local_irq_enable();
+
+ if (count >= 10000) {
+ printk(KERN_ERR "ad74111: failed to configure codec\n");
+ return -1;
+ }
+ return 0;
+}
+
+static int bf5xx_probe(struct platform_device *pdev)
+{
+ int err;
+
+ if (gpio_request(GPIO_SE, "AD74111_SE")) {
+ printk(KERN_ERR "%s: Failed ro request GPIO_%d\n", __func__, GPIO_SE);
+ return -EBUSY;
+ }
+ gpio_direction_output(GPIO_SE, 0);
+
+ if (GPIO_SE != GPIO_RESET) {
+ if (gpio_request(GPIO_RESET, "AD74111_RESET")) {
+ printk(KERN_ERR "%s: Failed ro request GPIO_%d\n", __func__, GPIO_RESET);
+ gpio_free(GPIO_SE);
+ return -EBUSY;
+ }
+ gpio_direction_output(GPIO_RESET, 0);
+ }
+
+ err = snd_ad74111_configure();
+ if (err < 0)
+ return -EFAULT;
+
+ return 0;
+}
+
+static int bf5xx_ad74111_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+ int ret = 0;
+
+ pr_debug("%s rate %d format %x\n", __func__, params_rate(params),
+ params_format(params));
+
+ /* set cpu DAI configuration */
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static struct snd_soc_ops bf5xx_ad74111_ops = {
+ .hw_params = bf5xx_ad74111_hw_params,
+};
+
+static struct snd_soc_dai_link bf5xx_ad74111_dai[] = {
+ {
+ .name = "ad74111",
+ .stream_name = "AD74111",
+ .cpu_dai_name = "bfin-i2s.0",
+ .codec_dai_name = "ad74111-hifi",
+ .platform_name = "bfin-pcm-audio",
+ .codec_name = "ad74111-codec",
+ .ops = &bf5xx_ad74111_ops,
+ },
+ {
+ .name = "ad74111",
+ .stream_name = "AD74111",
+ .cpu_dai_name = "bfin-i2s.1",
+ .codec_dai_name = "ad74111-hifi",
+ .platform_name = "bfin-pcm-audio",
+ .codec_name = "ad74111-codec",
+ .ops = &bf5xx_ad74111_ops,
+ }
+};
+
+static struct snd_soc_card bf5xx_ad74111 = {
+ .name = "bf5xx_ad74111",
+ .probe = bf5xx_probe,
+ .dai_link = &bf5xx_ad74111_dai[CONFIG_SND_BF5XX_SPORT_NUM],
+ .num_links = 1,
+};
+
+static struct platform_device *bf5xx_ad74111_snd_device;
+
+static int __init bf5xx_ad74111_init(void)
+{
+ int ret;
+
+ pr_debug("%s enter\n", __func__);
+ bf5xx_ad74111_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!bf5xx_ad74111_snd_device)
+ return -ENOMEM;
+
+ platform_set_drvdata(bf5xx_ad74111_snd_device, &bf5xx_ad74111);
+ ret = platform_device_add(bf5xx_ad74111_snd_device);
+
+ if (ret)
+ platform_device_put(bf5xx_ad74111_snd_device);
+
+ return ret;
+}
+
+static void __exit bf5xx_ad74111_exit(void)
+{
+ pr_debug("%s enter\n", __func__);
+ platform_device_unregister(bf5xx_ad74111_snd_device);
+}
+
+module_init(bf5xx_ad74111_init);
+module_exit(bf5xx_ad74111_exit);
+
+/* Module information */
+MODULE_AUTHOR("Cliff Cai");
+MODULE_DESCRIPTION("ALSA SoC AD74111 Blackfin");
+MODULE_LICENSE("GPL");
+
Modified: trunk/sound/soc/codecs/Kconfig (9764 => 9765)
--- trunk/sound/soc/codecs/Kconfig 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/codecs/Kconfig 2011-03-24 10:27:39 UTC (rev 9765)
@@ -15,7 +15,8 @@
select SND_SOC_AC97_CODEC if SND_SOC_AC97_BUS
select SND_SOC_AD183X if SPI_MASTER
select SND_SOC_AD193X if SND_SOC_I2C_AND_SPI
- select SND_SOC_AD73311 if I2C
+ select SND_SOC_AD73311
+ select SND_SOC_AD74111
select SND_SOC_ADAU1361 if I2C
select SND_SOC_ADAU1373 if I2C
select SND_SOC_ADAU1381 if I2C
@@ -122,6 +123,9 @@
config SND_SOC_AD73311
tristate
+config SND_SOC_AD74111
+ tristate
+
config SND_SOC_ADAU1361
tristate
Modified: trunk/sound/soc/codecs/Makefile (9764 => 9765)
--- trunk/sound/soc/codecs/Makefile 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/codecs/Makefile 2011-03-24 10:27:39 UTC (rev 9765)
@@ -3,6 +3,7 @@
snd-soc-ad183x-objs := ad183x.o
snd-soc-ad193x-objs := ad193x.o
snd-soc-ad73311-objs := ad73311.o
+snd-soc-ad74111-objs := ad74111.o
snd-soc-adau1361-objs := adau1361.o
snd-soc-adau1373-objs := adau1373.o
snd-soc-adau1381-objs := adau1381.o
@@ -87,7 +88,8 @@
obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
obj-$(CONFIG_SND_SOC_AD183X) += snd-soc-ad183x.o
obj-$(CONFIG_SND_SOC_AD193X) += snd-soc-ad193x.o
-obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
+obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
+obj-$(CONFIG_SND_SOC_AD74111) += snd-soc-ad74111.o
obj-$(CONFIG_SND_SOC_ADAU1361) += snd-soc-adau1361.o
obj-$(CONFIG_SND_SOC_ADAU1373) += snd-soc-adau1373.o
obj-$(CONFIG_SND_SOC_ADAU1381) += snd-soc-adau1381.o
Modified: trunk/sound/soc/codecs/ad73311.c (9764 => 9765)
--- trunk/sound/soc/codecs/ad73311.c 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/codecs/ad73311.c 2011-03-24 10:27:39 UTC (rev 9765)
@@ -39,7 +39,6 @@
.formats = SNDRV_PCM_FMTBIT_S16_LE, },
};
-#if CONFIG_SND_AD7XXXX_SELECT == 0
static struct ad73311_snd_ctrls ad73311_ctrls = {
.dirate = 0,
.igs = 2,
@@ -152,14 +151,11 @@
SOC_SINGLE_EXT("Single-Ended Enable Switch", CTRL_REG_F, 5, 1, 0,
ad73311_seen_get, ad73311_seen_put),
};
-#endif
static int ad73311_soc_probe(struct snd_soc_codec *codec)
{
-#if CONFIG_SND_AD7XXXX_SELECT == 0
snd_soc_add_controls(codec, ad73311_snd_controls,
ARRAY_SIZE(ad73311_snd_controls));
-#endif
return 0;
}
Modified: trunk/sound/soc/codecs/ad73311.h (9764 => 9765)
--- trunk/sound/soc/codecs/ad73311.h 2011-03-24 10:26:50 UTC (rev 9764)
+++ trunk/sound/soc/codecs/ad73311.h 2011-03-24 10:27:39 UTC (rev 9765)
@@ -31,8 +31,6 @@
#ifndef __AD73311_H__
#define __AD73311_H__
-#if CONFIG_SND_AD7XXXX_SELECT == 0
-
#define AD_CONTROL 0x8000
#define AD_DATA 0x0000
#define AD_READ 0x4000
@@ -87,60 +85,6 @@
#define REGF_INV (1 << 6)
#define REGF_ALB (1 << 7)
-#elif CONFIG_SND_AD7XXXX_SELECT == 1
-
-#define AD_READ 0x0000
-#define AD_WRITE 0x8000
-
-/* Control register A */
-#define CTRL_REG_A (0 << 11)
-
-#define REGA_REFAMP (1 << 2)
-#define REGA_REF (1 << 3)
-#define REGA_DAC (1 << 4)
-#define REGA_ADC (1 << 5)
-#define REGA_ADC_INPAMP (1 << 6)
-
-/* Control register B */
-#define CTRL_REG_B (1 << 11)
-
-#define REGB_FCLKDIV(x) (x & 0x3)
-#define REGB_SCLKDIV(x) ((x & 0x3) << 2)
-#define REGB_TCLKDIV(x) ((x & 0x3) << 4)
-
-/* Control register C */
-#define CTRL_REG_C (2 << 11)
-
-#define REGC_ADC_HP (1 << 0)
-#define REGC_DAC_DEEMPH(x) ((x & 0x3) << 1)
-#define REGC_LG_DELAY (1 << 3)
-#define REGC_WORD_WIDTH(x) ((x & 0x3) << 4)
-
-/* Control register D */
-#define CTRL_REG_D (3 << 11)
-
-#define REGD_MASTER (1 << 0)
-#define REGD_FDCLK (1 << 1)
-#define REGD_DSP_MODE (1 << 2)
-#define REGD_MIX_MODE (1 << 3)
-#define REGD_MFS (1 << 9)
-
-/* Control register E */
-#define CTRL_REG_E (4 << 11)
-
-#define REGE_DAC_MUTE (1 << 0)
-#define REGE_ADC_MUTE (1 << 1)
-#define REGE_ADC_GAIN(x) ((x & 0x7) << 2)
-#define REGE_ADC_PEAKEN (1 << 5)
-
-/* Control register F */
-#define CTRL_REG_F (5 << 11)
-#define REGF_DAC_VOL(x) (x & 0x3F)
-
-/* Control register G */
-#define CTRL_REG_G (6 << 11)
-#endif
-
struct ad73311_snd_ctrls {
char dirate; /* Decimation/Interpolation Rate */
char igs; /* Input Gain Select */
Added: trunk/sound/soc/codecs/ad74111.c (0 => 9765)
--- trunk/sound/soc/codecs/ad74111.c (rev 0)
+++ trunk/sound/soc/codecs/ad74111.c 2011-03-24 10:27:39 UTC (rev 9765)
@@ -0,0 +1,78 @@
+/*
+ * ad74111.c -- ALSA Soc AD74111 codec support
+ *
+ * Copyright: Analog Device Inc.
+ * Author: Cliff Cai <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+static struct snd_soc_dai_driver ad74111_dai = {
+ .name = "ad74111-hifi",
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 1,
+ .rates = SNDRV_PCM_RATE_8000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE, },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 1,
+ .rates = SNDRV_PCM_RATE_8000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE, },
+};
+
+static struct snd_soc_codec_driver soc_codec_dev_ad74111;
+
+static int ad74111_probe(struct platform_device *pdev)
+{
+ return snd_soc_register_codec(&pdev->dev,
+ &soc_codec_dev_ad74111, &ad74111_dai, 1);
+}
+
+static int __devexit ad74111_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_codec(&pdev->dev);
+ return 0;
+}
+
+static struct platform_driver ad74111_codec_driver = {
+ .driver = {
+ .name = "ad74111-codec",
+ .owner = THIS_MODULE,
+ },
+
+ .probe = ad74111_probe,
+ .remove = __devexit_p(ad74111_remove),
+};
+
+static int __init ad74111_init(void)
+{
+ return platform_driver_register(&ad74111_codec_driver);
+}
+module_init(ad74111_init);
+
+static void __exit ad74111_exit(void)
+{
+ platform_driver_unregister(&ad74111_codec_driver);
+}
+module_exit(ad74111_exit);
+
+MODULE_DESCRIPTION("ASoC ad74111 driver");
+MODULE_AUTHOR("Cliff Cai ");
+MODULE_LICENSE("GPL");
Added: trunk/sound/soc/codecs/ad74111.h (0 => 9765)
--- trunk/sound/soc/codecs/ad74111.h (rev 0)
+++ trunk/sound/soc/codecs/ad74111.h 2011-03-24 10:27:39 UTC (rev 9765)
@@ -0,0 +1,85 @@
+/*
+ * File: sound/soc/codec/ad74111.h
+ * Based on:
+ * Author: Cliff Cai <[email protected]>
+ *
+ * Created: Thur Sep 25, 2008
+ * Description: definitions for AD74111 registers
+ *
+ *
+ * Modified:
+ * Copyright 2006 Analog Devices Inc.
+ *
+ * Bugs: Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __AD74111_H__
+#define __AD74111_H__
+
+#define AD_READ 0x0000
+#define AD_WRITE 0x8000
+
+/* Control register A */
+#define CTRL_REG_A (0 << 11)
+
+#define REGA_REFAMP (1 << 2)
+#define REGA_REF (1 << 3)
+#define REGA_DAC (1 << 4)
+#define REGA_ADC (1 << 5)
+#define REGA_ADC_INPAMP (1 << 6)
+
+/* Control register B */
+#define CTRL_REG_B (1 << 11)
+
+#define REGB_FCLKDIV(x) (x & 0x3)
+#define REGB_SCLKDIV(x) ((x & 0x3) << 2)
+#define REGB_TCLKDIV(x) ((x & 0x3) << 4)
+
+/* Control register C */
+#define CTRL_REG_C (2 << 11)
+
+#define REGC_ADC_HP (1 << 0)
+#define REGC_DAC_DEEMPH(x) ((x & 0x3) << 1)
+#define REGC_LG_DELAY (1 << 3)
+#define REGC_WORD_WIDTH(x) ((x & 0x3) << 4)
+
+/* Control register D */
+#define CTRL_REG_D (3 << 11)
+
+#define REGD_MASTER (1 << 0)
+#define REGD_FDCLK (1 << 1)
+#define REGD_DSP_MODE (1 << 2)
+#define REGD_MIX_MODE (1 << 3)
+#define REGD_MFS (1 << 9)
+
+/* Control register E */
+#define CTRL_REG_E (4 << 11)
+
+#define REGE_DAC_MUTE (1 << 0)
+#define REGE_ADC_MUTE (1 << 1)
+#define REGE_ADC_GAIN(x) ((x & 0x7) << 2)
+#define REGE_ADC_PEAKEN (1 << 5)
+
+/* Control register F */
+#define CTRL_REG_F (5 << 11)
+#define REGF_DAC_VOL(x) (x & 0x3F)
+
+/* Control register G */
+#define CTRL_REG_G (6 << 11)
+
+#endif
