Diff
Modified: trunk/sound/soc/codecs/adau1361.c (9777 => 9778)
--- trunk/sound/soc/codecs/adau1361.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1361.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -50,7 +50,107 @@
enum snd_soc_control_type control_type;
};
+struct adau1361_setup_data {
+ unsigned short i2c_bus;
+ unsigned short i2c_address;
+};
+
+struct adau1361_mode_register {
+ u16 regaddress;
+ u16 regvalue;
+};
+
/*
+ * Reset Mode - ADC capture/DAC playback
+ * (AInput mixers 0db, AOuput mixers 0db, HP out ON)
+ */
+static struct adau1361_mode_register adau1361_reset[RESET_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBMNOC, 0xE5},
+ {ADAU_PLBHPVL, 0x01},
+ {ADAU_PLBHPVR, 0x01},
+ {ADAU_PLBLOVL, 0x00},
+ {ADAU_PLBLOVR, 0x00},
+ {ADAU_MICCTRL, 0x00},
+ {ADAU_RECPWRM, 0x00},
+ {ADAU_RECMLC0, 0x01},
+ {ADAU_RECMLC1, RECMLC_MIC_0DB},
+ {ADAU_RECMRC0, 0x01},
+ {ADAU_RECMRC1, RECMLC_MIC_0DB},
+ {ADAU_RECVLCL, 0x82},
+ {ADAU_RECVLCR, 0x82},
+ {ADAU_RECMBIA, RECMBIA_DISABLE},
+ {ADAU_ALCCTR0, 0x00},
+ {ADAU_ALCCTR1, 0x00},
+ {ADAU_ALCCTR2, 0x00},
+ {ADAU_ALCCTR3, 0x1F},
+ {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
+ {ADAU_SPRTCT1, 0x01}, /* 0x01 = 64bclocks frame */
+ {ADAU_CONVCT0, 0x00},
+ {ADAU_CONVCT1, 0x00},
+ {ADAU_ADCCTL0, 0x00},
+ {ADAU_ADCCTL1, 0x00},
+ {ADAU_ADCCTL2, 0x00},
+ {ADAU_PLBMLC0, 0x21},
+ {ADAU_PLBMLC1, 0x00},
+ {ADAU_PLBMRC0, 0x41},
+ {ADAU_PLBMRC1, 0x00},
+ {ADAU_PLBMLLO, 0x03},
+ {ADAU_PLBMRLO, 0x09},
+ {ADAU_PLBLRMC, 0x01},
+ {ADAU_PLBCTRL, 0x00},
+ {ADAU_PLBPWRM, 0x00},
+ {ADAU_DACCTL0, 0x03},
+ {ADAU_DACCTL1, 0x00},
+ {ADAU_DACCTL2, 0x00},
+ {ADAU_SERPAD0, 0xAA},
+ {ADAU_COMPAD0, 0xAA},
+ {ADAU_COMPAD1, 0x00},
+ {ADAU_MCLKPAD, 0x0A},
+};
+
+/*
+ * Default Mode
+ * Analog microphones, ADC capture/DAC playback
+ * (AInput mixers ON, AOuput mixers ON, HP out ON)
+ */
+static struct adau1361_mode_register adau1361_mode0[MODE_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBHPVL, 0x03},
+ {ADAU_PLBHPVR, 0x03},
+ {ADAU_PLBLOVL, 0x02},
+ {ADAU_PLBLOVR, 0x02},
+ {ADAU_PLBMNOC, 0xE5},
+ /* analog mic */
+ {ADAU_RECVLCL, 0x82},
+ {ADAU_RECVLCR, 0x82},
+ {ADAU_MICCTRL, 0x00},
+};
+
+/*
+ * Digital Microphone mode,
+ * IIS Master, ADC capture/DAC playback
+ * (AInput mixers OFF, AOuput mixers ON, HP out ON)
+ */
+static struct adau1361_mode_register adau1361_mode1[MODE_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBHPVL, 0x03},
+ {ADAU_PLBHPVR, 0x03},
+ {ADAU_PLBLOVL, 0x02},
+ {ADAU_PLBLOVR, 0x02},
+ {ADAU_PLBMNOC, 0xE5},
+ /* digital mic */
+ {ADAU_RECVLCL, 0x00},
+ {ADAU_RECVLCR, 0x00},
+ {ADAU_MICCTRL, 0x20},
+};
+
+static struct adau1361_mode_register *adau1361_mode_registers[] = {
+ adau1361_mode0,
+ adau1361_mode1,
+};
+
+/*
* write register cache
*/
static inline int adau1361_write_reg_cache(struct snd_soc_codec *codec,
@@ -109,7 +209,7 @@
static int adau1361_write_reg_block(struct snd_soc_codec *codec,
unsigned int reg, u8 length, u8 *values)
{
- int count = length + 2; /*data plus 16bit register address*/
+ int count = length + 2; /* data plus 16bit register address */
u8 buf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
buf[0] = (u8)(reg >> 8);
@@ -403,13 +503,13 @@
};
static const struct _pll_div clock_dividers[] = {
- { 12000000, 45158400, 625, 477, /*44.1kHz*/
+ { 12000000, 45158400, 625, 477, /* 44.1kHz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12000000, 49152000, 125, 12, /*48kHz*/
+ {12000000, 49152000, 125, 12, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 45158400, 40, 27, /*44.1Khz*/
+ {12288000, 45158400, 40, 27, /* 44.1Khz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 49152000, 0, 0, /*48kHz*/
+ {12288000, 49152000, 0, 0, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_INT) },
};
@@ -460,7 +560,7 @@
pll_reg[5] = PLLCTRL_ENABLE;
adau1361_write_reg_block(codec, ADAU_PLLCTRL, 6, pll_reg);
- /* wait for PLL lock*/
+ /* wait for PLL lock */
do {
++counter;
schedule_timeout_interruptible(msecs_to_jiffies(1));
@@ -596,10 +696,10 @@
/* set master/slave audio interface */
reg = (snd_soc_read(codec, ADAU_SPRTCT0) & 0xFE);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM: /*master*/
+ case SND_SOC_DAIFMT_CBM_CFM: /* master */
reg |= 0x1;
break;
- case SND_SOC_DAIFMT_CBS_CFS: /*slave*/
+ case SND_SOC_DAIFMT_CBS_CFS: /* slave */
reg &= ~0x1;
break;
default:
@@ -624,7 +724,7 @@
return 0;
}
- /* set I2S iface format*/
+ /* set I2S iface format */
snd_soc_write(codec, ADAU_SPRTCT0, reg);
return 0;
}
@@ -827,7 +927,7 @@
.suspend = adau1361_suspend,
.resume = adau1361_resume,
.set_bias_level = adau1361_set_bias_level,
- .reg_cache_size = sizeof(adau1361_reg) /*ADAU_NUMCACHEREG*/,
+ .reg_cache_size = sizeof(adau1361_reg) /* ADAU_NUMCACHEREG */,
.reg_word_size = sizeof(u16),
.reg_cache_default = adau1361_reg,
};
Modified: trunk/sound/soc/codecs/adau1361.h (9777 => 9778)
--- trunk/sound/soc/codecs/adau1361.h 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1361.h 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,34 +1,23 @@
/*
- * header file fortone adau1361 sound chip
+ * header file for ADAU1361 sound chip
*
- * Copyright 2010 Analog Devices Inc.
+ * Copyright 2010-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
-
#ifndef __ADAU1361_H__
#define __ADAU1361_H__
-struct adau1361_setup_data {
- unsigned short i2c_bus;
- unsigned short i2c_address;
-};
-
-struct adau1361_mode_register {
- u16 regaddress;
- u16 regvalue;
-};
-
#define RESET_REGISTER_COUNT 42
#define MODE_REGISTER_COUNT 8
#define MASTER_MODE 1
#ifdef MASTER_MODE
-/* IIS mater mode*/
+/* IIS mater mode */
#define ADAU_SRPT_CTRL0 0x01
#else
-/* IIS slave mode*/
+/* IIS slave mode */
#define ADAU_SRPT_CTRL0 0x00
#endif
@@ -41,7 +30,6 @@
#define ADAU1361_PLL_FREQ_441 45158400
#define ADAU1361_PLL_FREQ_48 49152000
-
/* ADAU1361 control registers */
#define ADAU_FIRSTREG 0x4000
@@ -107,14 +95,14 @@
#define CLKCTRL_DISABLE 0x0
#define CLKCTRL_ENABLE 0x1
-/* PLL Control -- 6 bytes*/
-/*Bytes 5-6*/
+/* PLL Control -- 6 bytes */
+/* Bytes 5-6 */
#define PLLCTRL_DEN_MSB 0x00
#define PLLCTRL_DEN_LSB 0x00
-/*Bytes 3-4*/
+/* Bytes 3-4 */
#define PLLCTRL_NUM_MSB 0x00
#define PLLCTRL_NUM_LSB 0x00
-/*Byte 2*/
+/* Byte 2 */
#define PLLCTRL_INTPART_R2 0x10
#define PLLCTRL_INTPART_R3 0x18
#define PLLCTRL_INTPART_R4 0x20
@@ -128,15 +116,15 @@
#define PLLCTRL_INPUT_DIV4 0x06
#define PLLCTRL_TYPE_INT 0x0
#define PLLCTRL_TYPE_FRAC 0x1
-/*Byte 1*/
+/* Byte 1 */
#define PLLCTRL_DISABLE 0x0
#define PLLCTRL_ENABLE 0x1
-/*ADC*/
+/* ADC */
#define ADCCTL_DISABLE_MASK 0xFC
#define ADCCTL_ENABLE_MASK 0x03
-/*MIC*/
+/* MIC */
#define RECMBIA_DISABLE 0x00
#define RECMBIA_ENABLE 0x01
#define RECVLC_DISABLE_MASK 0xFC
@@ -161,101 +149,11 @@
#define ADAU1361_BITSFRAM_32 0x4000
#define ADAU1361_BITSFRAM_48 0x8000
-/*playback output control*/
+/* playback output control */
#define ADAU1361_VOLUME_MASK 0xFC
#define ADAU1361_VOLUME_BITS 0x2
#define ADAU1361_MUTE_MASK 0x02
#define ADAU1361_MUTE_BITS 0x1
#define ADAU1361_ADVOL_MASK 0xff
-/*
- * Reset Mode - ADC capture/DAC playback
- * (AInput mixers 0db, AOuput mixers 0db, HP out ON)
-*/
-static struct adau1361_mode_register adau1361_reset[RESET_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBMNOC, 0xE5},
- {ADAU_PLBHPVL, 0x01},
- {ADAU_PLBHPVR, 0x01},
- {ADAU_PLBLOVL, 0x00},
- {ADAU_PLBLOVR, 0x00},
- {ADAU_MICCTRL, 0x00},
- {ADAU_RECPWRM, 0x00},
- {ADAU_RECMLC0, 0x01},
- {ADAU_RECMLC1, RECMLC_MIC_0DB},
- {ADAU_RECMRC0, 0x01},
- {ADAU_RECMRC1, RECMLC_MIC_0DB},
- {ADAU_RECVLCL, 0x82},
- {ADAU_RECVLCR, 0x82},
- {ADAU_RECMBIA, RECMBIA_DISABLE},
- {ADAU_ALCCTR0, 0x00},
- {ADAU_ALCCTR1, 0x00},
- {ADAU_ALCCTR2, 0x00},
- {ADAU_ALCCTR3, 0x1F},
- {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
- {ADAU_SPRTCT1, 0x01}, /* 0x01 = 64bclocks frame */
- {ADAU_CONVCT0, 0x00},
- {ADAU_CONVCT1, 0x00},
- {ADAU_ADCCTL0, 0x00},
- {ADAU_ADCCTL1, 0x00},
- {ADAU_ADCCTL2, 0x00},
- {ADAU_PLBMLC0, 0x21},
- {ADAU_PLBMLC1, 0x00},
- {ADAU_PLBMRC0, 0x41},
- {ADAU_PLBMRC1, 0x00},
- {ADAU_PLBMLLO, 0x03},
- {ADAU_PLBMRLO, 0x09},
- {ADAU_PLBLRMC, 0x01},
- {ADAU_PLBCTRL, 0x00},
- {ADAU_PLBPWRM, 0x00},
- {ADAU_DACCTL0, 0x03},
- {ADAU_DACCTL1, 0x00},
- {ADAU_DACCTL2, 0x00},
- {ADAU_SERPAD0, 0xAA},
- {ADAU_COMPAD0, 0xAA},
- {ADAU_COMPAD1, 0x00},
- {ADAU_MCLKPAD, 0x0A},
-};
-
-/*
- * Default Mode
- * Analog microphones, ADC capture/DAC playback
- * (AInput mixers ON, AOuput mixers ON, HP out ON)
-*/
-static struct adau1361_mode_register adau1361_mode0[MODE_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBHPVL, 0x03},
- {ADAU_PLBHPVR, 0x03},
- {ADAU_PLBLOVL, 0x02},
- {ADAU_PLBLOVR, 0x02},
- {ADAU_PLBMNOC, 0xE5},
- /*analog mic*/
- {ADAU_RECVLCL, 0x82},
- {ADAU_RECVLCR, 0x82},
- {ADAU_MICCTRL, 0x00},
-};
-
-/*
- * Digital Microphone mode,
- * IIS Master, ADC capture/DAC playback
- * (AInput mixers OFF, AOuput mixers ON, HP out ON)
- */
-static struct adau1361_mode_register adau1361_mode1[MODE_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBHPVL, 0x03},
- {ADAU_PLBHPVR, 0x03},
- {ADAU_PLBLOVL, 0x02},
- {ADAU_PLBLOVR, 0x02},
- {ADAU_PLBMNOC, 0xE5},
- /*digital mic*/
- {ADAU_RECVLCL, 0x00},
- {ADAU_RECVLCR, 0x00},
- {ADAU_MICCTRL, 0x20},
-};
-
-static struct adau1361_mode_register *adau1361_mode_registers[] = {
- adau1361_mode0,
- adau1361_mode1,
-};
-
#endif
Modified: trunk/sound/soc/codecs/adau1373.c (9777 => 9778)
--- trunk/sound/soc/codecs/adau1373.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1373.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -40,7 +40,7 @@
static int adau1373_write_reg_block(struct snd_soc_codec *codec,
unsigned int reg, u8 length, u8 *values)
{
- int count = length + 1; /*data plus 8bit register address*/
+ int count = length + 1; /* data plus 8bit register address */
u8 buf[7] = {0, 0, 0, 0, 0, 0, 0};
buf[0] = (u8)(reg & 0xFF);
@@ -967,7 +967,7 @@
snd_soc_write(codec, ADAU_MICCTR1, 0x00);
snd_soc_write(codec, ADAU_EPCNTRL, 0x0C);
#endif
- /* Playback settings*/
+ /* Playback settings */
/* Headphone enabled */
snd_soc_write(codec, ADAU_LHPMIX, DAC1_RIGHT);
Modified: trunk/sound/soc/codecs/adau1373.h (9777 => 9778)
--- trunk/sound/soc/codecs/adau1373.h 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1373.h 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,7 +1,7 @@
/*
- * Driver for ADAU1373 sound codec
+ * header file for ADAU1373 sound codec
*
- * Copyright 2010 Analog Devices Inc.
+ * Copyright 2010-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
@@ -291,7 +291,7 @@
#define DAISR_FS 0x00
#define DAISRC_CLK2 0x20
-/* DAI_CTRL*/
+/* DAI_CTRL */
#define DAI_EN 0x01
#define DAI_SRCAEN 0x04
@@ -318,7 +318,7 @@
#define DOUT_CH3_DAC 0x08
#define DOUT_CH4_DAC 0x10
-/* DIGMIC_CTRL*/
+/* DIGMIC_CTRL */
#define DMICAEN 0x01
#define DMICASWP 0x02
#define DMICBEN 0x04
@@ -328,7 +328,7 @@
#define DAISR_FS 0x00
#define DAISRC_CLK2 0x20
-/* DAI_CTRL*/
+/* DAI_CTRL */
#define DAI_EN 0x01
/* DIN_MIX_CTRL */
@@ -354,7 +354,7 @@
#define DOUT_CH3_DAC 0x08
#define DOUT_CH4_DAC 0x10
-/* DIGMIC_CTRL*/
+/* DIGMIC_CTRL */
#define DMICAEN 0x01
#define DMICASWP 0x02
#define DMICBEN 0x04
Modified: trunk/sound/soc/codecs/adau1381.c (9777 => 9778)
--- trunk/sound/soc/codecs/adau1381.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1381.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -51,7 +51,70 @@
enum snd_soc_control_type control_type;
};
+struct adau1381_setup_data {
+ unsigned short i2c_bus;
+ unsigned short i2c_address;
+};
+
+struct adau1381_mode_register {
+ u16 regaddress;
+ u16 regvalue;
+};
+
/*
+ * Reset Mode - ADC capture/DAC playback
+ * (AInput mixers 0db, AOuput mixers 0db, HP out ON)
+ */
+static struct adau1381_mode_register adau1381_reset[RESET_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_RGUCTRL, 0x00},
+ {ADAU_RECCTRL, 0x00},
+ {ADAU_RECPWRM, 0x00},
+ {ADAU_RECGAIL, 0x07},
+ {ADAU_RECGAIR, 0x07},
+ {ADAU_RECMBIA, RECMBIA_DISABLE},
+ {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
+ {ADAU_SPRTCT1, 0x21}, /* 0x21 = 32bclocks frame, 0x41 = 48 */
+ {ADAU_CONVCT0, 0x00},
+ {ADAU_CONVCT1, 0x00},
+ {ADAU_ADCCTL0, 0x00},
+ {ADAU_LADCATT, 0x00},
+ {ADAU_RADCATT, 0x00},
+ {ADAU_PLMLCTL, 0x20},
+ {ADAU_PLMRCTL, 0x20},
+ {ADAU_PLBMCTL, 0x00},
+ {ADAU_PLBCAMP, 0x00},
+ {ADAU_RLOMUTE, 0x02},
+ {ADAU_LLOMUTE, 0x02},
+ {ADAU_PLSPCTL, 0x01},
+ {ADAU_ZXDETCT, 0x01},
+ {ADAU_PLBPWRM, 0x00},
+ {ADAU_DACCTRL, 0x03},
+ {ADAU_LDACATT, 0x00},
+ {ADAU_RDACATT, 0x00},
+ {ADAU_SERPAD0, 0xAA},
+ {ADAU_SERPAD1, 0x00},
+ {ADAU_COMPAD0, 0xAA},
+ {ADAU_COMPAD1, 0x00},
+ {ADAU_MCKOCTL, 0x00},
+};
+
+static struct adau1381_mode_register adau1381_mode0[MODE_REGISTER_COUNT] = {
+ /* analog mic */
+ {ADAU_RECCTRL, 0x00},
+};
+
+static struct adau1381_mode_register adau1381_mode1[MODE_REGISTER_COUNT] = {
+ /* digital mic */
+ {ADAU_RECCTRL, 0x10},
+};
+
+static struct adau1381_mode_register *adau1381_mode_registers[] = {
+ adau1381_mode0,
+ adau1381_mode1,
+};
+
+/*
* write register cache
*/
static inline int adau1381_write_reg_cache(struct snd_soc_codec *codec,
@@ -110,7 +173,7 @@
static int adau1381_write_reg_block(struct snd_soc_codec *codec,
unsigned int reg, u8 length, u8 *values)
{
- int count = length + 2; /*data plus 16bit register address*/
+ int count = length + 2; /* data plus 16bit register address */
u8 buf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
buf[0] = (u8)(reg >> 8);
@@ -237,13 +300,13 @@
};
static const struct _pll_div clock_dividers[] = {
- { 12000000, 45158400, 625, 477, /*44.1kHz*/
+ { 12000000, 45158400, 625, 477, /* 44.1kHz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12000000, 49152000, 125, 12, /*48kHz*/
+ {12000000, 49152000, 125, 12, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 45158400, 40, 27, /*44.1Khz*/
+ {12288000, 45158400, 40, 27, /* 44.1Khz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 49152000, 0, 0, /*48kHz*/
+ {12288000, 49152000, 0, 0, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_INT) },
};
@@ -294,7 +357,7 @@
pll_reg[5] = PLLCTRL_ENABLE;
adau1381_write_reg_block(codec, ADAU_PLLCTRL, 6, pll_reg);
- /* wait for PLL lock*/
+ /* wait for PLL lock */
do {
++counter;
schedule_timeout_interruptible(msecs_to_jiffies(1));
@@ -454,10 +517,10 @@
/* set master/slave audio interface */
reg = (snd_soc_read(codec, ADAU_SPRTCT0) & 0xFE);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM: /*master*/
+ case SND_SOC_DAIFMT_CBM_CFM: /* master */
reg |= 0x1;
break;
- case SND_SOC_DAIFMT_CBS_CFS: /*slave*/
+ case SND_SOC_DAIFMT_CBS_CFS: /* slave */
reg &= ~0x1;
break;
default:
@@ -482,7 +545,7 @@
return 0;
}
- /* set I2S iface format*/
+ /* set I2S iface format */
snd_soc_write(codec, ADAU_SPRTCT0, reg);
return 0;
}
Modified: trunk/sound/soc/codecs/adau1381.h (9777 => 9778)
--- trunk/sound/soc/codecs/adau1381.h 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1381.h 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,34 +1,23 @@
/*
- * header file fortone adau1381 sound chip
+ * header file for ADAU1381 sound chip
*
- * Copyright 2010 Analog Devices Inc.
+ * Copyright 2010-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
-
#ifndef __ADAU1381_H__
#define __ADAU1381_H__
-struct adau1381_setup_data {
- unsigned short i2c_bus;
- unsigned short i2c_address;
-};
-
-struct adau1381_mode_register {
- u16 regaddress;
- u16 regvalue;
-};
-
#define RESET_REGISTER_COUNT 40
#define MODE_REGISTER_COUNT 1
#define MASTER_MODE 1
#ifdef MASTER_MODE
-/* IIS mater mode*/
+/* IIS mater mode */
#define ADAU_SRPT_CTRL0 0x01
#else
-/* IIS slave mode*/
+/* IIS slave mode */
#define ADAU_SRPT_CTRL0 0x00
#endif
@@ -41,7 +30,6 @@
#define ADAU1381_PLL_FREQ_441 45158400
#define ADAU1381_PLL_FREQ_48 49152000
-
/* ADAU1381 control registers */
#define ADAU_FIRSTREG 0x4000
@@ -86,7 +74,6 @@
#define ADAU_ENGIRUN 0x40F6
#define ADAU_SAMRATE 0x40F8
-
#define ADAU_LASTREG 0x40F8
#define ADAU_NUMCACHEREG 40
@@ -102,14 +89,14 @@
#define CLKCTRL_DISABLE 0x0
#define CLKCTRL_ENABLE 0x1
-/* PLL Control -- 6 bytes*/
-/*Bytes 5-6*/
+/* PLL Control -- 6 bytes */
+/* Bytes 5-6 */
#define PLLCTRL_DEN_MSB 0x00
#define PLLCTRL_DEN_LSB 0x00
-/*Bytes 3-4*/
+/* Bytes 3-4 */
#define PLLCTRL_NUM_MSB 0x00
#define PLLCTRL_NUM_LSB 0x00
-/*Byte 2*/
+/* Byte 2 */
#define PLLCTRL_INTPART_R2 0x10
#define PLLCTRL_INTPART_R3 0x18
#define PLLCTRL_INTPART_R4 0x20
@@ -123,15 +110,15 @@
#define PLLCTRL_INPUT_DIV4 0x06
#define PLLCTRL_TYPE_INT 0x0
#define PLLCTRL_TYPE_FRAC 0x1
-/*Byte 1*/
+/* Byte 1 */
#define PLLCTRL_DISABLE 0x0
#define PLLCTRL_ENABLE 0x1
-/*ADC*/
+/* ADC */
#define ADCCTL_DISABLE_MASK 0xFC
#define ADCCTL_ENABLE_MASK 0x03
-/*MIC*/
+/* MIC */
#define RECMBIA_DISABLE 0x00
#define RECMBIA_ENABLE 0x01
#define RECVLC_DISABLE_MASK 0xFC
@@ -156,64 +143,11 @@
#define ADAU1381_BITSFRAM_32 0x4000
#define ADAU1381_BITSFRAM_48 0x8000
-/*playback output control*/
+/* playback output control */
#define ADAU1381_VOLUME_MASK 0xFC
#define ADAU1381_VOLUME_BITS 0x2
#define ADAU1381_MUTE_MASK 0x02
#define ADAU1381_MUTE_BITS 0x1
#define ADAU1381_ADVOL_MASK 0xff
-/*
- * Reset Mode - ADC capture/DAC playback
- * (AInput mixers 0db, AOuput mixers 0db, HP out ON)
-*/
-static struct adau1381_mode_register adau1381_reset[RESET_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_RGUCTRL, 0x00},
- {ADAU_RECCTRL, 0x00},
- {ADAU_RECPWRM, 0x00},
- {ADAU_RECGAIL, 0x07},
- {ADAU_RECGAIR, 0x07},
- {ADAU_RECMBIA, RECMBIA_DISABLE},
- {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
- {ADAU_SPRTCT1, 0x21}, /*0x21 = 32bclocks frame, 0x41 = 48*/
- {ADAU_CONVCT0, 0x00},
- {ADAU_CONVCT1, 0x00},
- {ADAU_ADCCTL0, 0x00},
- {ADAU_LADCATT, 0x00},
- {ADAU_RADCATT, 0x00},
- {ADAU_PLMLCTL, 0x20},
- {ADAU_PLMRCTL, 0x20},
- {ADAU_PLBMCTL, 0x00},
- {ADAU_PLBCAMP, 0x00},
- {ADAU_RLOMUTE, 0x02},
- {ADAU_LLOMUTE, 0x02},
- {ADAU_PLSPCTL, 0x01},
- {ADAU_ZXDETCT, 0x01},
- {ADAU_PLBPWRM, 0x00},
- {ADAU_DACCTRL, 0x03},
- {ADAU_LDACATT, 0x00},
- {ADAU_RDACATT, 0x00},
- {ADAU_SERPAD0, 0xAA},
- {ADAU_SERPAD1, 0x00},
- {ADAU_COMPAD0, 0xAA},
- {ADAU_COMPAD1, 0x00},
- {ADAU_MCKOCTL, 0x00},
-};
-
-static struct adau1381_mode_register adau1381_mode0[MODE_REGISTER_COUNT] = {
- /*analog mic*/
- {ADAU_RECCTRL, 0x00},
-};
-
-static struct adau1381_mode_register adau1381_mode1[MODE_REGISTER_COUNT] = {
- /*digital mic*/
- {ADAU_RECCTRL, 0x10},
-};
-
-static struct adau1381_mode_register *adau1381_mode_registers[] = {
- adau1381_mode0,
- adau1381_mode1,
-};
-
#endif
Modified: trunk/sound/soc/codecs/adau1701.c (9777 => 9778)
--- trunk/sound/soc/codecs/adau1701.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1701.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -94,7 +94,7 @@
return -EINVAL;
}
length = register_table[i].length;
- count = length + 2; /*data plus 16bit register address*/
+ count = length + 2; /* data plus 16bit register address */
buf[0] = reg_address >> 8;
buf[1] = reg_address;
@@ -226,7 +226,7 @@
return -EINVAL;
}
- /* set iface format*/
+ /* set iface format */
adau1701_write_register(codec, ADAU1701_SERITL1, reg);
return 0;
}
Modified: trunk/sound/soc/codecs/adau1701.h (9777 => 9778)
--- trunk/sound/soc/codecs/adau1701.h 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1701.h 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,5 +1,5 @@
/*
- * header file for adau1701 SigmaDSP processor
+ * header file for ADAU1701 SigmaDSP processor
*
* Copyright 2011 Analog Devices Inc.
*
Modified: trunk/sound/soc/codecs/adau1761.c (9777 => 9778)
--- trunk/sound/soc/codecs/adau1761.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1761.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -54,7 +54,133 @@
enum snd_soc_control_type control_type;
};
+struct adau1761_setup_data {
+ unsigned short i2c_bus;
+ unsigned short i2c_address;
+};
+
+struct adau1761_mode_register {
+ u16 regaddress;
+ u16 regvalue;
+};
+
/*
+ * Reset Mode - ADC capture/DAC playback, dsp core disabled
+ * (AInput mixers 0db, AOuput mixers 0db, HP out ON, DSP core OFF)
+ */
+static struct adau1761_mode_register adau1761_reset[RESET_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBMNOC, 0xE5},
+ {ADAU_PLBHPVL, 0x01},
+ {ADAU_PLBHPVR, 0x01},
+ {ADAU_PLBLOVL, 0x00},
+ {ADAU_PLBLOVR, 0x00},
+
+ {ADAU_DSP_RUN, 0x00},
+ {ADAU_DSP_ENA, 0x00},
+ {ADAU_MICCTRL, 0x00},
+ {ADAU_RECPWRM, 0x00},
+ {ADAU_RECMLC0, 0x01},
+ {ADAU_RECMLC1, RECMLC_MIC_0DB},
+ {ADAU_RECMRC0, 0x01},
+ {ADAU_RECMRC1, RECMLC_MIC_0DB},
+ {ADAU_RECVLCL, 0x82},
+ {ADAU_RECVLCR, 0x82},
+ {ADAU_RECMBIA, RECMBIA_DISABLE},
+ {ADAU_ALCCTR0, 0x00},
+ {ADAU_ALCCTR1, 0x00},
+ {ADAU_ALCCTR2, 0x00},
+ {ADAU_ALCCTR3, 0x1F},
+ {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
+ {ADAU_SPRTCT1, 0x21}, /* 0x21 = 32bclocks frame, 0x41 = 48 */
+ {ADAU_CONVCT0, 0x00},
+ {ADAU_CONVCT1, 0x00},
+ {ADAU_ADCCTL0, 0x00},
+ {ADAU_ADCCTL1, 0x00},
+ {ADAU_ADCCTL2, 0x00},
+ {ADAU_PLBMLC0, 0x21},
+ {ADAU_PLBMLC1, 0x00},
+ {ADAU_PLBMRC0, 0x41},
+ {ADAU_PLBMRC1, 0x00},
+ {ADAU_PLBMLLO, 0x03},
+ {ADAU_PLBMRLO, 0x09},
+ {ADAU_PLBLRMC, 0x01},
+ {ADAU_PLBCTRL, 0x00},
+ {ADAU_PLBPWRM, 0x00},
+ {ADAU_DACCTL0, 0x03},
+ {ADAU_DACCTL1, 0x00},
+ {ADAU_DACCTL2, 0x00},
+ {ADAU_DSP_CRC, 0x00},
+ {ADAU_DSP_GPI, 0x00},
+ {ADAU_DSP_SR1, 0x07},
+ {ADAU_SERPAD0, 0xAA},
+ {ADAU_SERPAD1, 0x00},
+ {ADAU_COMPAD0, 0xAA},
+ {ADAU_COMPAD1, 0x00},
+ {ADAU_MCLKPAD, 0x0A},
+ {ADAU_INP_ROT, 0x01},
+#ifdef ADAU1716_ADC_SOFT_PATCH
+ {ADAU_OUT_ROT, 0x00},
+#else
+ {ADAU_OUT_ROT, 0x01},
+#endif
+ {ADAU_SER_SRT, 0x00},
+ {ADAU_DSP_SLW, 0x00},
+ {ADAU_SER_DAT, 0x00},
+ {ADAU_CLK_EN0, 0x5F},
+ {ADAU_CLK_EN1, 0x01},
+};
+
+/*
+ * Default Mode
+ * Analog microphones, ADC capture/DAC playback, dsp core disabled
+ * (AInput mixers ON, AOuput mixers ON, HP out ON)
+ */
+static struct adau1761_mode_register adau1761_mode0[MODE_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBHPVL, 0x03},
+ {ADAU_PLBHPVR, 0x03},
+ {ADAU_PLBLOVL, 0x02},
+ {ADAU_PLBLOVR, 0x02},
+ {ADAU_PLBMNOC, 0xE5},
+
+ {ADAU_CLK_EN0, 0x5F},
+ {ADAU_CLK_EN1, 0x01},
+
+ /* analog mic */
+ {ADAU_RECVLCL, 0x82},
+ {ADAU_RECVLCR, 0x82},
+ {ADAU_MICCTRL, 0x00},
+};
+
+/*
+ * Digital Microphone mode,
+ * IIS Master, ADC capture/DAC playback, dsp core disabled
+ * (AInput mixers OFF, AOuput mixers ON, HP out ON)
+ */
+static struct adau1761_mode_register adau1761_mode1[MODE_REGISTER_COUNT] = {
+ /* mute outputs */
+ {ADAU_PLBHPVL, 0x03},
+ {ADAU_PLBHPVR, 0x03},
+ {ADAU_PLBLOVL, 0x02},
+ {ADAU_PLBLOVR, 0x02},
+ {ADAU_PLBMNOC, 0xE5},
+
+ {ADAU_CLK_EN0, 0x5F},
+ {ADAU_CLK_EN1, 0x03},
+
+ /* digital mic */
+ {ADAU_RECVLCL, 0x00},
+ {ADAU_RECVLCR, 0x00},
+ {ADAU_MICCTRL, 0x20},
+};
+
+static struct adau1761_mode_register *adau1761_mode_registers[] = {
+ adau1761_mode0,
+ adau1761_mode1,
+};
+
+/*
* write register cache
*/
static inline int adau1761_write_reg_cache(struct snd_soc_codec *codec,
@@ -112,7 +238,7 @@
static int adau1761_write_reg_block(struct snd_soc_codec *codec,
unsigned int reg, u8 length, u8 *values)
{
- int count = length + 2; /*data plus 16bit register address*/
+ int count = length + 2; /* data plus 16bit register address */
u8 buf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
buf[0] = (u8)(reg >> 8);
@@ -406,13 +532,13 @@
};
static const struct _pll_div clock_dividers[] = {
- { 12000000, 45158400, 625, 477, /*44.1kHz*/
+ { 12000000, 45158400, 625, 477, /* 44.1kHz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12000000, 49152000, 125, 12, /*48kHz*/
+ {12000000, 49152000, 125, 12, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 45158400, 40, 27, /*44.1Khz*/
+ {12288000, 45158400, 40, 27, /* 44.1Khz */
(PLLCTRL_INTPART_R3|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_FRAC) },
- {12288000, 49152000, 0, 0, /*48kHz*/
+ {12288000, 49152000, 0, 0, /* 48kHz */
(PLLCTRL_INTPART_R4|PLLCTRL_INPUT_DIV1|PLLCTRL_TYPE_INT) },
};
@@ -465,7 +591,7 @@
pll_reg[5] = PLLCTRL_ENABLE;
adau1761_write_reg_block(codec, ADAU_PLLCTRL, 6, pll_reg);
- /* wait for PLL lock*/
+ /* wait for PLL lock */
do {
++counter;
schedule_timeout_interruptible(msecs_to_jiffies(1));
@@ -656,11 +782,11 @@
/* set master/slave audio interface */
reg = (snd_soc_read(codec, ADAU_SPRTCT0) & 0xFE);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM: /*master*/
+ case SND_SOC_DAIFMT_CBM_CFM: /* master */
reg |= 0x1;
snd_soc_write(codec, ADAU_CLK_EN1, CLK_EN1_MASTER);
break;
- case SND_SOC_DAIFMT_CBS_CFS: /*slave*/
+ case SND_SOC_DAIFMT_CBS_CFS: /* slave */
reg |= 0x0;
snd_soc_write(codec, ADAU_CLK_EN1, CLK_EN1_SLAVE);
break;
@@ -686,7 +812,7 @@
return 0;
}
- /* set I2S iface format*/
+ /* set I2S iface format */
snd_soc_write(codec, ADAU_SPRTCT0, reg);
return 0;
}
Modified: trunk/sound/soc/codecs/adau1761.h (9777 => 9778)
--- trunk/sound/soc/codecs/adau1761.h 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adau1761.h 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,25 +1,14 @@
/*
- * header file fortone adau1761 sound chip
+ * header file for ADAU1761 sound chip
*
- * Copyright 2009 Analog Devices Inc.
+ * Copyright 2009-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
-
#ifndef __ADAU1761_H__
#define __ADAU1761_H__
-struct adau1761_setup_data {
- unsigned short i2c_bus;
- unsigned short i2c_address;
-};
-
-struct adau1761_mode_register {
- u16 regaddress;
- u16 regvalue;
-};
-
#define RESET_REGISTER_COUNT 54
#define MODE_REGISTER_COUNT 10
@@ -27,10 +16,10 @@
#define ADAU1716_ADC_SOFT_PATCH 1
#define MASTER_MODE 1
#ifdef MASTER_MODE
-/* IIS mater mode*/
+/* IIS mater mode */
#define ADAU_SRPT_CTRL0 0x01
#else
-/* IIS slave mode*/
+/* IIS slave mode */
#define ADAU_SRPT_CTRL0 0x00
#endif
@@ -132,14 +121,14 @@
#define CLKCTRL_DISABLE 0x0
#define CLKCTRL_ENABLE 0x1
-/* PLL Control -- 6 bytes*/
-/*Bytes 5-6*/
+/* PLL Control -- 6 bytes */
+/* Bytes 5-6 */
#define PLLCTRL_DEN_MSB 0x00
#define PLLCTRL_DEN_LSB 0x00
-/*Bytes 3-4*/
+/* Bytes 3-4 */
#define PLLCTRL_NUM_MSB 0x00
#define PLLCTRL_NUM_LSB 0x00
-/*Byte 2*/
+/* Byte 2 */
#define PLLCTRL_INTPART_R2 0x10
#define PLLCTRL_INTPART_R3 0x18
#define PLLCTRL_INTPART_R4 0x20
@@ -153,15 +142,15 @@
#define PLLCTRL_INPUT_DIV4 0x06
#define PLLCTRL_TYPE_INT 0x0
#define PLLCTRL_TYPE_FRAC 0x1
-/*Byte 1*/
+/* Byte 1 */
#define PLLCTRL_DISABLE 0x0
#define PLLCTRL_ENABLE 0x1
-/*ADC*/
+/* ADC */
#define ADCCTL_DISABLE_MASK 0xFC
#define ADCCTL_ENABLE_MASK 0x03
-/*MIC*/
+/* MIC */
#define RECMBIA_DISABLE 0x00
#define RECMBIA_ENABLE 0x01
#define RECVLC_DISABLE_MASK 0xFC
@@ -191,127 +180,11 @@
#define ADAU1761_BITSFRAM_32 0x4000
#define ADAU1761_BITSFRAM_48 0x8000
-/*playback output control*/
+/* playback output control */
#define ADAU1761_VOLUME_MASK 0xFC
#define ADAU1761_VOLUME_BITS 0x2
#define ADAU1761_MUTE_MASK 0x02
#define ADAU1761_MUTE_BITS 0x1
#define ADAU1761_ADVOL_MASK 0xff
-/*
- * Reset Mode - ADC capture/DAC playback, dsp core disabled
- * (AInput mixers 0db, AOuput mixers 0db, HP out ON, DSP core OFF)
-*/
-static struct adau1761_mode_register adau1761_reset[RESET_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBMNOC, 0xE5},
- {ADAU_PLBHPVL, 0x01},
- {ADAU_PLBHPVR, 0x01},
- {ADAU_PLBLOVL, 0x00},
- {ADAU_PLBLOVR, 0x00},
-
- {ADAU_DSP_RUN, 0x00},
- {ADAU_DSP_ENA, 0x00},
- {ADAU_MICCTRL, 0x00},
- {ADAU_RECPWRM, 0x00},
- {ADAU_RECMLC0, 0x01},
- {ADAU_RECMLC1, RECMLC_MIC_0DB},
- {ADAU_RECMRC0, 0x01},
- {ADAU_RECMRC1, RECMLC_MIC_0DB},
- {ADAU_RECVLCL, 0x82},
- {ADAU_RECVLCR, 0x82},
- {ADAU_RECMBIA, RECMBIA_DISABLE},
- {ADAU_ALCCTR0, 0x00},
- {ADAU_ALCCTR1, 0x00},
- {ADAU_ALCCTR2, 0x00},
- {ADAU_ALCCTR3, 0x1F},
- {ADAU_SPRTCT0, ADAU_SRPT_CTRL0},
- {ADAU_SPRTCT1, 0x21}, /*0x21 = 32bclocks frame, 0x41 = 48*/
- {ADAU_CONVCT0, 0x00},
- {ADAU_CONVCT1, 0x00},
- {ADAU_ADCCTL0, 0x00},
- {ADAU_ADCCTL1, 0x00},
- {ADAU_ADCCTL2, 0x00},
- {ADAU_PLBMLC0, 0x21},
- {ADAU_PLBMLC1, 0x00},
- {ADAU_PLBMRC0, 0x41},
- {ADAU_PLBMRC1, 0x00},
- {ADAU_PLBMLLO, 0x03},
- {ADAU_PLBMRLO, 0x09},
- {ADAU_PLBLRMC, 0x01},
- {ADAU_PLBCTRL, 0x00},
- {ADAU_PLBPWRM, 0x00},
- {ADAU_DACCTL0, 0x03},
- {ADAU_DACCTL1, 0x00},
- {ADAU_DACCTL2, 0x00},
- {ADAU_DSP_CRC, 0x00},
- {ADAU_DSP_GPI, 0x00},
- {ADAU_DSP_SR1, 0x07},
- {ADAU_SERPAD0, 0xAA},
- {ADAU_SERPAD1, 0x00},
- {ADAU_COMPAD0, 0xAA},
- {ADAU_COMPAD1, 0x00},
- {ADAU_MCLKPAD, 0x0A},
- {ADAU_INP_ROT, 0x01},
-#ifdef ADAU1716_ADC_SOFT_PATCH
- {ADAU_OUT_ROT, 0x00},
-#else
- {ADAU_OUT_ROT, 0x01},
#endif
- {ADAU_SER_SRT, 0x00},
- {ADAU_DSP_SLW, 0x00},
- {ADAU_SER_DAT, 0x00},
- {ADAU_CLK_EN0, 0x5F},
- {ADAU_CLK_EN1, 0x01},
-};
-
-/*
- * Default Mode
- * Analog microphones, ADC capture/DAC playback, dsp core disabled
- * (AInput mixers ON, AOuput mixers ON, HP out ON)
-*/
-static struct adau1761_mode_register adau1761_mode0[MODE_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBHPVL, 0x03},
- {ADAU_PLBHPVR, 0x03},
- {ADAU_PLBLOVL, 0x02},
- {ADAU_PLBLOVR, 0x02},
- {ADAU_PLBMNOC, 0xE5},
-
- {ADAU_CLK_EN0, 0x5F},
- {ADAU_CLK_EN1, 0x01},
-
- /*analog mic*/
- {ADAU_RECVLCL, 0x82},
- {ADAU_RECVLCR, 0x82},
- {ADAU_MICCTRL, 0x00},
-};
-
-/*
- * Digital Microphone mode,
- * IIS Master, ADC capture/DAC playback, dsp core disabled
- * (AInput mixers OFF, AOuput mixers ON, HP out ON)
- */
-static struct adau1761_mode_register adau1761_mode1[MODE_REGISTER_COUNT] = {
- /* mute outputs */
- {ADAU_PLBHPVL, 0x03},
- {ADAU_PLBHPVR, 0x03},
- {ADAU_PLBLOVL, 0x02},
- {ADAU_PLBLOVR, 0x02},
- {ADAU_PLBMNOC, 0xE5},
-
- {ADAU_CLK_EN0, 0x5F},
- {ADAU_CLK_EN1, 0x03},
-
- /*digital mic*/
- {ADAU_RECVLCL, 0x00},
- {ADAU_RECVLCR, 0x00},
- {ADAU_MICCTRL, 0x20},
-};
-
-static struct adau1761_mode_register *adau1761_mode_registers[] = {
- adau1761_mode0,
- adau1761_mode1,
-};
-
-#endif
Modified: trunk/sound/soc/codecs/adav80x.c (9777 => 9778)
--- trunk/sound/soc/codecs/adav80x.c 2011-03-27 08:01:20 UTC (rev 9777)
+++ trunk/sound/soc/codecs/adav80x.c 2011-03-27 08:38:17 UTC (rev 9778)
@@ -1,7 +1,7 @@
/*
* ADAV80X Audio Codec driver supporting ADAV801, ADAV803
*
- * Copyright 2010 Analog Devices Inc.
+ * Copyright 2010-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
