commit: http://blackfin.uclinux.org/git/?p=linux-kernel;a=commitdiff;h=e41241b737417f5e491cb05c52c158dedb3297e1 branch: http://blackfin.uclinux.org/git/?p=linux-kernel;a=shortlog;h=refs/heads/2012R1
Add configs to support re-program clocks while Kernel boots. Signed-off-by: Bob Liu <[email protected]> --- arch/blackfin/Kconfig | 39 ++++++++++++++++++++++++++++++++++++--- 1 files changed, 36 insertions(+), 3 deletions(-) diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index bd98c84..f4fb12e 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -434,7 +434,7 @@ config BFIN_KERNEL_CLOCK config PLL_BYPASS bool "Bypass PLL" - depends on BFIN_KERNEL_CLOCK + depends on BFIN_KERNEL_CLOCK && (!BF60x) default n config CLKIN_HALF @@ -487,10 +487,43 @@ config SCLK_DIV range 1 15 default 5 help - This sets the frequency of the system clock (including SDRAM or DDR). + This sets the frequency of the system clock (including SDRAM or DDR) on + !BF60x else it set the clock for system buses and provides the + source from which SCLK0 and SCLK1 are derived. This can be between 1 and 15 System Clock = (PLL frequency) / (this setting) +config SCLK0_DIV + int "System Clock0 Divider" + depends on BFIN_KERNEL_CLOCK && BF60x + range 1 15 + default 5 + help + This sets the frequency of the system clock0 for PVP and all other + peripherals not clocked by SCLK1. + This can be between 1 and 15 + System Clock0 = (System Clock) / (this setting) + +config SCLK1_DIV + int "System Clock1 Divider" + depends on BFIN_KERNEL_CLOCK && BF60x + range 1 15 + default 5 + help + This sets the frequency of the system clock1 for SPORT, SPI and ACM. + This can be between 1 and 15 + System Clock1 = (System Clock) / (this setting) + +config DCLK_DIV + int "DDR Clock Divider" + depends on BFIN_KERNEL_CLOCK && BF60x + range 1 15 + default 5 + help + This sets the frequency of the DDR memory. + This can be between 1 and 15 + DDR Clock = (PLL frequency) / (this setting) + choice prompt "DDR SDRAM Chip Type" depends on BFIN_KERNEL_CLOCK @@ -506,7 +539,7 @@ endchoice choice prompt "DDR/SDRAM Timing" - depends on BFIN_KERNEL_CLOCK + depends on BFIN_KERNEL_CLOCK && !BF60x default BFIN_KERNEL_CLOCK_MEMINIT_CALC help This option allows you to specify Blackfin SDRAM/DDR Timing parameters
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