Date:        Tue, 10 Oct 2000 00:44:58 +0200
   From: "Andi Kleen" <[EMAIL PROTECTED]>

   On Mon, Oct 09, 2000 at 11:41:13PM +0100, Alan Cox wrote:
   > I dont actually know a CPU that doesnt have one in SMP mode. Its just often
   > behind an I/O interface that is slower than ideal

   Where would you put it for IA32 ? I don't know any free MSR that could
   be abused for that, and acessing MSRs is insanely slow anyways.  Any
   other ideas ? 

The local APIC holds the hardware cpu number (which happens to equal
the logical cpu number in the current x86 code).  And I believe the
local APIC has a 32-bit scratch register or 2 as well... but don't
quote me on that one.

Later,
David S. Miller
[EMAIL PROTECTED]
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