Greetings, This series was prompted by a need to adjust the clock rate of the rtc The existing code performs a soft reset during probe, which wipes out several registers including the offset register, which performs adjustments to the clock rate.
The first several patches are cleanup, with patch 5 and 6 avoiding the reset, and patch 9 adding a nice sysfs interface to the clock offset. I know that this is not the only rtc to provide a programmable clock offset I wonder if this interface would make a good addition to the rtc api? The rtc chips I have seen list their clock adjustments in parts per million. I went with parts per billion, since the ppm listed was listed with a fractional component. Joshua Clayton (9): rtc-pcf2123: Document all registers and useful bits rtc-pcf2123: clean up reads from the chip rtc-pcf2123: clean up writes to the rtc chip rtc-pcf2123: replace magic numbers with defines rtc-pcf2123: put the chip reset into a function rtc-pcf2123: avoid resetting the clock if possible rtc-pcf2123: allow sysfs to accept hexidecimal rtc-pcf2123: use sysfs groups rtc-pcf2123: adjust the clock rate via sysfs drivers/rtc/rtc-pcf2123.c | 391 ++++++++++++++++++++++++++++++---------------- 1 file changed, 257 insertions(+), 134 deletions(-) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
