On Fri, Nov 6, 2015 at 8:49 PM, Kapil Hali <kap...@broadcom.com> wrote:
> Add SMP support for Broadcom's Northstar Plus SoC
> cpu enable method. This changes also consolidates
> iProc family's - BCM NSP and BCM Kona, platform
> SMP handling in a common file.
>
> Northstar Plus SoC is based on ARM Cortex-A9
> revision r3p0 which requires configuration for ARM
> Errata 764369 for SMP. This change adds the needed
> configuration option.
>
> Signed-off-by: Kapil Hali <kap...@broadcom.com>
This version looks saner to me.
> +static int nsp_write_lut(void)
> +{
> + void __iomem *sku_rom_lut;
> + phys_addr_t secondary_startup_phy;
> +
> + if (!secondary_boot) {
> + pr_warn("required secondary boot register not specified\n");
> + return -EINVAL;
> + }
> +
> + sku_rom_lut = ioremap_nocache((phys_addr_t)secondary_boot,
> + sizeof(secondary_boot));
Why is this address not just taken directly from the device tree?
If it is not in the device tree: why?
Also give it a sane name, bcm_sec_boot_address or so.
"secondary_boot" sounds like a function you call to boot
the second core.
Yours,
Linus Walleij
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