Hi! A representative from SiLabs writes: "All the currently published versions of the Si5351 (v1.0) and AN619 (v0.6) do not include the “Si5351A/C only” disclaimer. Based on this and our current understanding, I see no issue performing a PLLB reset for ‘B’ type devices.". Hence, it should not be any issues always performing the PLL reset.
Changes in v2: - Output disabling and power down removed in order to prevent breaking systems requiring always-enabled clocks - Cosmetic changes Jacob Jacob Siverskog (1): clk: si5351: Add PLL soft reset drivers/clk/clk-si5351.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.6.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/