> I'm worried by this... At no point do you check the host bridge > capabilities, and thus will happily set the max read req size to some > value larger than the max the host bridge can cope...
Well, it's disabled by default... the option is there as a quick way to fix "why is my bandwidth so low" when a broken BIOS sets these to minimum values. Maybe we should just strip out that code and point people who want to tweak this at setpci instead. > So for PCI-X, if we want tat, we need a pcibios hook for the platform > to validate the size requested. For PCI-E, we can use standard code to > look for the root complex (and bridges on the path to it) and get the > proper max value. Actually even PCIe might not be that easy. For example with current kernels on PowerPC 440SPe (SoC with PCIe), I just get: # lspci 00:01.0 InfiniBand: Mellanox Technology: Unknown device 6274 (rev a0) ie no host bridge / root complex. - R. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/