Hello Andi, On Tue, Jan 12, 2016 at 7:11 AM, Andi Shyti <[email protected]> wrote: > In some architectures the L2 cache controller is integrated in the > processor's block itself and it doesn't use any external cache > controller. This means that an entry in the board's dtb related > to the l2c is not necessary. > > Distinguish between error codes and do not print anything in case > l2x0_of_init() doesn't find any L2C DTB entry and returns -ENODEV. > > This patch mutes the following error message: > > L2C: failed to init: -19 > > on boards like odroid-xu4, cortex A7/A15, which don't have > external cache controller. >
The patch also looks good to me and makes the error message to go away in my Exynos5800 Peach Pi. Reviewed-by: Javier Martinez Canillas <[email protected]> Tested-by: Javier Martinez Canillas <[email protected]> Best regards, Javier
