On Sat, Jan 23, 2016 at 05:55:30PM +0900, Masahiro Yamada wrote:
> These two are both ARMv7 SoCs. They need not explicitly select
> ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.
>
> Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1
> cachelines for ARMv7 CPUs").
>
> Signed-off-by: Masahiro Yamada <[email protected]>
> ---
>
> drivers/soc/tegra/Kconfig | 2 --
> 1 file changed, 2 deletions(-)Applied, thanks. Thierry
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