On 2/2/2016 3:02 AM, Joshua Henderson wrote:
From: Purna Chandra Mandal <[email protected]>
Document the devicetree bindings for the deadman timer peripheral found on
Microchip PIC32 SoC class devices.
Signed-off-by: Purna Chandra Mandal <[email protected]>
Signed-off-by: Joshua Henderson <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: <[email protected]>
---
Note: Please merge this patch series through the MIPS tree.
---
.../bindings/watchdog/microchip,pic32-dmt.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644
Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
new file mode 100644
index 0000000..f7374ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
@@ -0,0 +1,19 @@
+* Microchip PIC32 Deadman Timer
+
+The deadman timer is used to reset the processor in the event of a software
+malfunction. It is a free-running instruction fetch timer, which is clocked
+whenever an instruction fetch occurs until a count match occurs.
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-dmt".
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- clocks: phandle of parent clock (should be &PBCLK7).
+
+Example:
+
+ watchdog2: dmt@1f800a00 {
The node names should be generic, i.e. "watchdog" in this case.
[...]
MBR, Sergei
